122 lines
5.0 KiB
Tcl
122 lines
5.0 KiB
Tcl
###############################################################################
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## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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# ip
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
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global VIVADO_IP_LIBRARY
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adi_ip_create axi_adrv9001
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adi_ip_files axi_adrv9001 [list \
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"$ad_hdl_dir/library/xilinx/common/ad_serdes_clk.v" \
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"$ad_hdl_dir/library/xilinx/common/ad_mmcm_drp.v" \
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"$ad_hdl_dir/library/xilinx/common/ad_serdes_in.v" \
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"$ad_hdl_dir/library/xilinx/common/ad_serdes_out.v" \
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"$ad_hdl_dir/library/xilinx/common/ad_mul.v" \
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"$ad_hdl_dir/library/common/ad_dds_cordic_pipe.v" \
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"$ad_hdl_dir/library/common/ad_dds_sine_cordic.v" \
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"$ad_hdl_dir/library/common/ad_dds_sine.v" \
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"$ad_hdl_dir/library/common/ad_dds_1.v" \
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"$ad_hdl_dir/library/common/ad_dds_2.v" \
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"$ad_hdl_dir/library/common/ad_dds.v" \
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"$ad_hdl_dir/library/common/ad_datafmt.v" \
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"$ad_hdl_dir/library/common/up_tdd_cntrl.v" \
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"$ad_hdl_dir/library/common/ad_tdd_control.v" \
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"$ad_hdl_dir/library/common/ad_addsub.v" \
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"$ad_hdl_dir/library/common/ad_rst.v" \
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"$ad_hdl_dir/library/common/up_xfer_cntrl.v" \
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"$ad_hdl_dir/library/common/up_xfer_status.v" \
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"$ad_hdl_dir/library/common/up_clock_mon.v" \
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"$ad_hdl_dir/library/common/up_delay_cntrl.v" \
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"$ad_hdl_dir/library/common/up_adc_common.v" \
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"$ad_hdl_dir/library/common/up_adc_channel.v" \
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"$ad_hdl_dir/library/common/up_dac_common.v" \
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"$ad_hdl_dir/library/common/up_dac_channel.v" \
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"$ad_hdl_dir/library/common/ad_pnmon.v" \
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"$ad_hdl_dir/library/common/ad_pngen.v" \
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"$ad_hdl_dir/library/common/up_axi.v" \
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"$ad_hdl_dir/library/xilinx/common/up_xfer_cntrl_constr.xdc" \
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"$ad_hdl_dir/library/xilinx/common/ad_rst_constr.xdc" \
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"$ad_hdl_dir/library/xilinx/common/up_xfer_status_constr.xdc" \
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"$ad_hdl_dir/library/xilinx/common/up_clock_mon_constr.xdc" \
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"adrv9001_rx.v" \
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"adrv9001_tx.v" \
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"adrv9001_pack.v" \
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"adrv9001_aligner4.v" \
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"adrv9001_aligner8.v" \
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"adrv9001_rx_link.v" \
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"adrv9001_tx_link.v" \
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"axi_adrv9001_rx.v" \
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"axi_adrv9001_rx_channel.v" \
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"axi_adrv9001_if.v" \
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"axi_adrv9001_tx.v" \
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"axi_adrv9001_tx_channel.v" \
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"axi_adrv9001_core.v" \
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"axi_adrv9001_constr.xdc" \
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"axi_adrv9001_tdd.v" \
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"axi_adrv9001.v" ]
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adi_ip_properties axi_adrv9001
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adi_init_bd_tcl
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adi_ip_bd axi_adrv9001 "bd/bd.tcl"
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adi_ip_add_core_dependencies [list \
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analog.com:$VIVADO_IP_LIBRARY:util_cdc:1.0 \
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]
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set cc [ipx::current_core]
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ipx::infer_bus_interface delay_clk xilinx.com:signal:clock_rtl:1.0 $cc
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ipx::infer_bus_interface adc_1_clk xilinx.com:signal:clock_rtl:1.0 $cc
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ipx::infer_bus_interface adc_2_clk xilinx.com:signal:clock_rtl:1.0 $cc
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ipx::infer_bus_interface dac_1_clk xilinx.com:signal:clock_rtl:1.0 $cc
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ipx::infer_bus_interface dac_2_clk xilinx.com:signal:clock_rtl:1.0 $cc
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ipx::infer_bus_interface adc_1_rst xilinx.com:signal:reset_rtl:1.0 $cc
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ipx::infer_bus_interface adc_2_rst xilinx.com:signal:reset_rtl:1.0 $cc
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ipx::infer_bus_interface dac_1_rst xilinx.com:signal:reset_rtl:1.0 $cc
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ipx::infer_bus_interface dac_2_rst xilinx.com:signal:reset_rtl:1.0 $cc
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ipx::add_bus_parameter POLARITY [ipx::get_bus_interfaces adc_1_rst -of_objects $cc]
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ipx::add_bus_parameter POLARITY [ipx::get_bus_interfaces adc_2_rst -of_objects $cc]
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ipx::add_bus_parameter POLARITY [ipx::get_bus_interfaces dac_1_rst -of_objects $cc]
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ipx::add_bus_parameter POLARITY [ipx::get_bus_interfaces dac_2_rst -of_objects $cc]
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set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.INDEPENDENT_1R1T_SUPPORT')) == 1 && spirit:decode(id('MODELPARAM_VALUE.DISABLE_TX2_SSI')) == 0} \
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[ipx::get_ports dac_2* -of_objects $cc]
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set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.INDEPENDENT_1R1T_SUPPORT')) == 1 && spirit:decode(id('MODELPARAM_VALUE.DISABLE_RX2_SSI')) == 0} \
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[ipx::get_ports adc_2* -of_objects $cc]
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set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.DISABLE_TX2_SSI')) == 0} \
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[ipx::get_ports *tx2_* -of_objects $cc]
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set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.DISABLE_RX2_SSI')) == 0} \
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[ipx::get_ports *rx2_* -of_objects $cc]
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set_property driver_value 0 [ipx::get_ports *_sync_in* -of_objects $cc]
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## Customize XGUI layout
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set page0 [ipgui::get_pagespec -name "Page 0" -component $cc]
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ipgui::add_param -name "EXT_SYNC" -component $cc -parent $page0
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set_property -dict [list \
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"display_name" "External sync" \
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"tooltip" "NOTE: If active enables the external synchronization features for Rx and Tx. The external sync signals must be synchronous with to ref_clk" \
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"widget" "checkBox" \
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] [ipgui::get_guiparamspec -name "EXT_SYNC" -component $cc]
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adi_set_ports_dependency "adc_sync_in" \
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"(spirit:decode(id('MODELPARAM_VALUE.EXT_SYNC')) == 1)"
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adi_set_ports_dependency "dac_sync_in" \
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"(spirit:decode(id('MODELPARAM_VALUE.EXT_SYNC')) == 1)"
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adi_add_auto_fpga_spec_params
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ipx::create_xgui_files $cc
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ipx::save_core $cc
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