19 lines
437 B
Tcl
19 lines
437 B
Tcl
# ip
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
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adi_ip_create util_extract
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adi_ip_files util_extract [list \
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"util_extract.v" ]
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adi_ip_properties_lite util_extract
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set_property company_url {https://wiki.analog.com/resources/fpga/docs/util_extract} [ipx::current_core]
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ipx::infer_bus_interface clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::save_core [ipx::current_core]
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