..
altera
cpack- signaltap mess
2015-06-29 16:31:53 -04:00
ad_addsub.v
ad9361_tdd: Some naming and hierarchical changes
2015-06-04 18:09:49 +03:00
ad_axi_ip_constr.sdc
library: make preset registered for timing paths
2015-06-10 13:41:41 -04:00
ad_axi_ip_constr.xdc
library: make preset registered for timing paths
2015-06-10 13:41:41 -04:00
ad_axis_dma_rx.v
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2015-06-26 11:07:10 +02:00
ad_axis_dma_tx.v
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2015-06-26 11:07:10 +02:00
ad_axis_inf_rx.v
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2015-06-26 11:07:10 +02:00
ad_csc_1.v
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2015-06-26 11:07:10 +02:00
ad_csc_1_add.v
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2015-06-26 11:07:10 +02:00
ad_csc_1_mul.v
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2015-06-26 11:07:10 +02:00
ad_csc_CrYCb2RGB.v
imageon_zc706: Updates and fixes
2015-03-27 18:57:32 +02:00
ad_csc_RGB2CrYCb.v
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2015-06-26 11:07:10 +02:00
ad_datafmt.v
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2015-06-26 11:07:10 +02:00
ad_dcfilter.v
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2015-06-26 11:07:10 +02:00
ad_dds.v
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2015-06-26 11:07:10 +02:00
ad_dds_1.v
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2015-06-26 11:07:10 +02:00
ad_dds_sine.v
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2015-06-26 11:07:10 +02:00
ad_gt_channel_1.v
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2015-06-26 11:07:10 +02:00
ad_gt_common_1.v
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2015-06-26 11:07:10 +02:00
ad_gt_es.v
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2015-06-26 11:07:10 +02:00
ad_iobuf.v
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2015-06-26 11:07:10 +02:00
ad_iqcor.v
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2015-06-26 11:07:10 +02:00
ad_jesd_align.v
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2015-06-26 11:07:10 +02:00
ad_lvds_clk.v
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2015-06-26 11:07:10 +02:00
ad_lvds_in.v
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2015-06-26 11:07:10 +02:00
ad_lvds_out.v
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2015-06-26 11:07:10 +02:00
ad_mem.v
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2015-06-26 11:07:10 +02:00
ad_mem_asym.v
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2015-06-26 11:07:10 +02:00
ad_mmcm_drp.v
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2015-06-26 11:07:10 +02:00
ad_mul.v
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2015-06-26 11:07:10 +02:00
ad_mul_u16.v
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2015-06-26 11:07:10 +02:00
ad_pnmon.v
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2015-06-26 11:07:10 +02:00
ad_rst.v
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2015-06-26 11:07:10 +02:00
ad_serdes_clk.v
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2015-06-26 11:07:10 +02:00
ad_serdes_in.v
axi_ad9434 : Update the IO delay interface
2015-05-22 19:47:09 +03:00
ad_serdes_out.v
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2015-06-26 11:07:10 +02:00
ad_ss_422to444.v
common: Add color space sampling and color space conversion modules
2015-01-08 12:24:46 +02:00
ad_ss_444to422.v
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2015-06-26 11:07:10 +02:00
ad_tdd_control.v
ad_tdd_control: Connect the reset to all the flops
2015-06-11 12:07:47 +03:00
axi_ctrlif.vhd
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2015-06-26 11:07:10 +02:00
axi_streaming_dma_rx_fifo.vhd
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2015-06-26 11:07:10 +02:00
axi_streaming_dma_tx_fifo.vhd
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2015-06-26 11:07:10 +02:00
dma_fifo.vhd
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2015-06-26 11:07:10 +02:00
pl330_dma_fifo.vhd
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2015-06-26 11:07:10 +02:00
sync_bits.v
library: Use common prefix for CDC signal names
2015-04-15 17:20:22 +02:00
sync_gray.v
library: Use common prefix for CDC signal names
2015-04-15 17:20:22 +02:00
up_adc_channel.v
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2015-06-26 11:07:10 +02:00
up_adc_common.v
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2015-06-26 11:07:10 +02:00
up_axi.v
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2015-06-26 11:07:10 +02:00
up_axis_dma_rx.v
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2015-06-26 11:07:10 +02:00
up_axis_dma_tx.v
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2015-06-26 11:07:10 +02:00
up_clkgen.v
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2015-06-26 11:07:10 +02:00
up_clock_mon.v
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2015-06-26 11:07:10 +02:00
up_dac_channel.v
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2015-06-26 11:07:10 +02:00
up_dac_common.v
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2015-06-26 11:07:10 +02:00
up_delay_cntrl.v
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2015-06-26 11:07:10 +02:00
up_drp_cntrl.v
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2015-06-26 11:07:10 +02:00
up_gt.v
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2015-06-26 11:07:10 +02:00
up_hdmi_rx.v
axi_hdmi_rx: Drop TPG enable from register map
2015-06-30 18:02:43 +02:00
up_hdmi_tx.v
axi_hdmi_tx: Add control to bypass chroma sub-sampler
2015-06-30 21:16:09 +02:00
up_pmod.v
cftl_cip: Add util_pmod_fmeter IP to library
2015-02-23 17:20:12 +02:00
up_tdd_cntrl.v
ad9361/tdd: Fix generation of tx_valid_* signals
2015-06-08 16:22:21 +03:00
up_xfer_cntrl.v
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2015-06-26 11:07:10 +02:00
up_xfer_status.v
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2015-06-26 11:07:10 +02:00