Istvan Csomortani 8996044978 axi_adxcvr: Fix warning related to up_es_reset ... Fix the following warning: WARNING: [Synth 8-2611] redeclaration of ANSI port up_es_reset is not allowed Also make sure, that in all configurations, the register has a diver.		2019-03-21 14:30:39 +02:00
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axi_adcfifo	axi_adcfifo: Fix constraints to apply also to Ultrascale devices	2018-09-07 17:44:47 +03:00
axi_adxcvr	axi_adxcvr: Fix warning related to up_es_reset	2019-03-21 14:30:39 +02:00
axi_dacfifo	Makefile: update makefiles	2018-12-21 17:32:48 +02:00
axi_xcvrlb	Move Altera IP core dependency tracking to library Makefiles	2018-04-11 15:09:54 +03:00
common	Remove Xilinx 6 series support	2018-10-17 10:06:40 +03:00
util_adxcvr	util_adxcvr: Initial commit for QPLL1 support (GTH3 and GTH4)	2019-02-11 17:20:08 +02:00