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axi_ad6676
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axi_ad6676: Updated constraints
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2015-09-25 17:02:42 +03:00 |
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axi_ad9122
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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axi_ad9144
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axi_ad9144: Updated altera interfaces, added FIFO conduits per channel
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2015-11-24 11:44:07 +02:00 |
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axi_ad9152
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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axi_ad9234
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axi_ad9234: Clock ratio is indicating a sampling clock ratio
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2015-09-24 11:19:18 +03:00 |
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axi_ad9250
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axi_ad9250: Updated altera interfaces, added FIFO conduits per channel
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2015-11-24 11:39:55 +02:00 |
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axi_ad9265
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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axi_ad9361
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axi_ad9361: Updated altera interfaces, added FIFO conduits per channel
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2015-11-24 11:21:08 +02:00 |
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axi_ad9434
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Make: Update Make files
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2015-09-25 19:11:21 +03:00 |
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axi_ad9467
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Make: Update Make files
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2015-09-25 19:11:21 +03:00 |
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axi_ad9625
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axi_ad9625: Updated constraints and added adc reset port
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2015-09-25 17:16:31 +03:00 |
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axi_ad9643
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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axi_ad9652
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axi_ad9652: Updated with the latest constraints
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2015-09-28 11:29:07 +03:00 |
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axi_ad9671
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axi_ad9671: Updated constraints
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2015-10-09 13:15:55 +03:00 |
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axi_ad9680
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axi_ad9680: Updated altera interfaces, added FIFO conduits per channel
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2015-11-24 11:45:12 +02:00 |
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axi_ad9739a
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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axi_adcfifo
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Revert commit 6b99ce
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2015-08-26 13:48:28 +03:00 |
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axi_clkgen
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library: Axi_clkgen, added register for controlling the source clock.
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2015-11-25 11:16:32 +02:00 |
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axi_dmac
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Merge branch 'master' into dev
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2015-11-26 13:38:11 +02:00 |
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axi_generic_adc
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Revert commit 6b99ce
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2015-08-26 13:48:28 +03:00 |
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axi_gpreg
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Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries
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2015-11-10 09:32:50 +02:00 |
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axi_hdmi_rx
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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axi_hdmi_tx
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axi_hdmi_tx: Add parameter to configure the output clock polarity
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2015-11-03 10:59:13 +01:00 |
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axi_i2s_adi
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Revert commit 6b99ce
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2015-08-26 13:48:28 +03:00 |
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axi_jesd_gt
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up_gt: separate pll resets to tx/rx
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2015-10-02 13:58:30 -04:00 |
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axi_jesd_xcvr
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xcvr- remove status constraint
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2015-08-20 13:54:15 -04:00 |
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axi_mc_controller
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axi_mc_controller: Removed channels, as no data needs to be streamed to DMA
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2015-10-09 13:54:03 +03:00 |
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axi_mc_current_monitor
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axi_mc_current_monitor: Removed stub channel
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2015-10-09 13:52:14 +03:00 |
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axi_mc_speed
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axi_mc_speed: Corrected maximum number of channels
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2015-10-09 13:50:25 +03:00 |
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axi_spdif_rx
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Revert commit 6b99ce
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2015-08-26 13:48:28 +03:00 |
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axi_spdif_tx
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Revert commit 6b99ce
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2015-08-26 13:48:28 +03:00 |
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axi_usb_fx3
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axi_usb_fx3: Initial commit of the core with interface stub
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2015-10-23 13:27:00 +03:00 |
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cn0363
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Add CN0363 project
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2015-05-21 17:21:35 +02:00 |
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common
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library: Axi_clkgen, added register for controlling the source clock.
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2015-11-25 11:16:32 +02:00 |
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cordic_demod
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Add cordic demodulator module
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2015-05-21 17:21:35 +02:00 |
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interfaces
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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prcfg
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library/prcfg : Split data bus to channels
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2015-10-13 11:36:45 +03:00 |
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scripts
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adi_ip.tcl: Add support for adding bd files to a core
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2015-09-18 15:27:14 +02:00 |
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spi_engine
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library: 2015.2 updates
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2015-08-25 09:13:24 +03:00 |
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util_adc_pack
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_adcfifo
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util_adcfifo: Updated altera interface
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2015-11-25 10:20:06 +02:00 |
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util_axis_fifo
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util_axis_fifo: Remove m_axis_addr_next output from the address modules
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2015-09-21 17:58:01 +02:00 |
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util_axis_resize
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_bsplit
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_ccat
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_cpack
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util_cpack: Updated altera interfaces
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2015-11-24 11:18:18 +02:00 |
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util_dac_unpack
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_dacfifo
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util_dacfifo: Update read out method
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2015-10-08 17:13:12 +03:00 |
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util_gmii_to_rgmii
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library: 2015.2 updates
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2015-08-25 09:13:24 +03:00 |
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util_gtlb
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util_gtlb: output receive/transmit clocks
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2015-11-05 11:28:34 -05:00 |
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util_i2c_mixer
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Add .gitattributes file
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2015-07-01 18:43:51 +02:00 |
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util_jesd_gt
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util_jesd_gt: bad idea, it is needed for ipi
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2015-10-15 11:13:08 -04:00 |
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util_mfifo
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Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries
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2015-11-10 09:32:50 +02:00 |
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util_pmod_adc
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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util_pmod_fmeter
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_rfifo
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_sigma_delta_spi
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hdl/library: Update the IP parameters
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2015-08-19 14:11:47 +03:00 |
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util_tdd_sync
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util_tdd_sync: Sync signals output reg is a false path source
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2015-11-17 09:42:05 +02:00 |
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util_upack
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util_upack: Fixed problem when dac valid isn't continuous from the DAC
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2016-02-04 13:03:46 +02:00 |
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util_wfifo
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util_wfifo: Fix reset related timing violation
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2015-09-23 16:36:33 +03:00 |
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Makefile
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util_tdd_sync: Initial commit
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2015-11-11 10:46:11 +02:00 |
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