Istvan Csomortani b9a5bb3549 axi_dacfifo: Optimize the AXI read logic ... Save the valid AXI beats number of the last AXI transaction, and the valid DMA beats number of the last AXI beat, so the read back logic can use this data and prevent to feel up the CDC memory with invalid samples. Also in this way the end of the read back cycle get a more robust control: no more duplicated samples at the end of the buffer.		2016-07-20 11:49:06 +03:00
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Makefile	make: Update Make files	2016-06-29 14:50:07 +03:00
axi_dacfifo.v	axi_dacfifo: Optimize the AXI read logic	2016-07-20 11:49:06 +03:00
axi_dacfifo_constr.xdc	library/axi_dacfifo: Update the bypass logic	2016-06-22 12:24:54 +03:00
axi_dacfifo_dac.v	axi_dacfifo: Optimize the AXI read logic	2016-07-20 11:49:06 +03:00
axi_dacfifo_ip.tcl	library/axi_dacfifo: Update the bypass logic	2016-06-22 12:24:54 +03:00
axi_dacfifo_rd.v	axi_dacfifo: Optimize the AXI read logic	2016-07-20 11:49:06 +03:00
axi_dacfifo_wr.v	axi_dacfifo: Optimize the AXI read logic	2016-07-20 11:49:06 +03:00