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Lars-Peter Clausen 8a2b29cdbe axi_damc: Add xfer_req to the FIFO source interface 
The xfer_req signal will be high if DMA core the is expecting data.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2014-07-02 16:05:16 +02:00
library axi_damc: Add xfer_req to the FIFO source interface 2014-07-02 16:05:16 +02:00
projects a5soc: removed jtag master control 2014-07-01 12:27:37 -04:00
.gitignore a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md Add a link to EngineerZone 2014-04-15 10:25:18 +03:00

README.md

hdl

Analog Devices HDL libraries and projects

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga