25 lines
1.3 KiB
Plaintext
25 lines
1.3 KiB
Plaintext
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create_clock -period 5.000 -name sys_clk_p [get_ports sys_clk_p]
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set_property PACKAGE_PIN AF43 [get_ports sys_clk_n]
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set_property PACKAGE_PIN AE42 [get_ports sys_clk_p]
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# Define SPI clock
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create_clock -name spi0_clk -period 40 [get_pins -hier */EMIOSPI0SCLKO]
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create_clock -name spi1_clk -period 40 [get_pins -hier */EMIOSPI1SCLKO]
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# GPIOs
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# (switches, leds and such)
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set_property -dict {PACKAGE_PIN H34 IOSTANDARD LVCMOS18} [get_ports gpio_led[0]] ; # DS6
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set_property -dict {PACKAGE_PIN J33 IOSTANDARD LVCMOS18} [get_ports gpio_led[1]] ; # DS5
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set_property -dict {PACKAGE_PIN K36 IOSTANDARD LVCMOS18} [get_ports gpio_led[2]] ; # DS4
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set_property -dict {PACKAGE_PIN L35 IOSTANDARD LVCMOS18} [get_ports gpio_led[3]] ; # DS3
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set_property -dict {PACKAGE_PIN J35 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[0]] ; # SW6.1
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set_property -dict {PACKAGE_PIN J34 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[1]] ; # SW6.2
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set_property -dict {PACKAGE_PIN H37 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[2]] ; # SW6.3
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set_property -dict {PACKAGE_PIN H36 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[3]] ; # SW6.4
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set_property -dict {PACKAGE_PIN G37 IOSTANDARD LVCMOS18} [get_ports gpio_pb[0]] ; # SW4
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set_property -dict {PACKAGE_PIN G36 IOSTANDARD LVCMOS18} [get_ports gpio_pb[1]] ; # SW5
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