Laszlo Nagy e794d04cd1 axi_dmac: renamed .h files to .vh ... Vivado recognises .h files as C header files, the expected extension for Verilog Header is .vh This causes issues in simulating block designs since these files won't be exported for the simulation even if they are part of the simulation fileset.		2018-07-11 11:30:22 +03:00
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adi_env.tcl	adi_env: Normalize environment variables	2017-10-23 12:15:14 +01:00
adi_ip.tcl	axi_dmac: ttcl file support for simulation	2018-07-11 11:30:22 +03:00
adi_ip_alt.tcl	axi_dmac: renamed .h files to .vh	2018-07-11 11:30:22 +03:00
library.mk	Add quiet mode to the Makefile system	2018-04-11 15:09:54 +03:00