38 lines
3.4 KiB
Plaintext
38 lines
3.4 KiB
Plaintext
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# ad6676
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set_property -dict {PACKAGE_PIN AD10} [get_ports rx_ref_clk_p] ; ## D04 FMC_HPC_GBTCLK0_M2C_P
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set_property -dict {PACKAGE_PIN AD9 } [get_ports rx_ref_clk_n] ; ## D05 FMC_HPC_GBTCLK0_M2C_N
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set_property -dict {PACKAGE_PIN AH10} [get_ports rx_data_p[0]] ; ## C06 FMC_HPC_DP0_M2C_P
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set_property -dict {PACKAGE_PIN AH9 } [get_ports rx_data_n[0]] ; ## C07 FMC_HPC_DP0_M2C_N
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set_property -dict {PACKAGE_PIN AJ8 } [get_ports rx_data_p[1]] ; ## A02 FMC_HPC_DP1_M2C_P
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set_property -dict {PACKAGE_PIN AJ7 } [get_ports rx_data_n[1]] ; ## A03 FMC_HPC_DP1_M2C_N
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set_property -dict {PACKAGE_PIN AG21 IOSTANDARD LVDS_25} [get_ports rx_sync_p] ; ## D08 FMC_HPC_LA01_CC_P
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set_property -dict {PACKAGE_PIN AH21 IOSTANDARD LVDS_25} [get_ports rx_sync_n] ; ## D09 FMC_HPC_LA01_CC_N
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set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_p] ; ## G06 FMC_HPC_LA00_CC_P
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set_property -dict {PACKAGE_PIN AG20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_n] ; ## G07 FMC_HPC_LA00_CC_N
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set_property -dict {PACKAGE_PIN AH24 IOSTANDARD LVCMOS25} [get_ports spi_csn] ; ## D12 FMC_HPC_LA05_N
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set_property -dict {PACKAGE_PIN AK20 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## H11 FMC_HPC_LA04_N
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set_property -dict {PACKAGE_PIN AJ20 IOSTANDARD LVCMOS25} [get_ports spi_mosi] ; ## H10 FMC_HPC_LA04_P
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set_property -dict {PACKAGE_PIN AH23 IOSTANDARD LVCMOS25} [get_ports spi_miso] ; ## D11 FMC_HPC_LA05_P
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set_property -dict {PACKAGE_PIN AH22 IOSTANDARD LVCMOS25} [get_ports adc_oen] ; ## C11 FMC_HPC_LA06_N
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set_property -dict {PACKAGE_PIN AF19 IOSTANDARD LVCMOS25} [get_ports adc_sela] ; ## G12 FMC_HPC_LA08_P
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set_property -dict {PACKAGE_PIN AG19 IOSTANDARD LVCMOS25} [get_ports adc_selb] ; ## G13 FMC_HPC_LA08_N
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set_property -dict {PACKAGE_PIN AJ23 IOSTANDARD LVCMOS25} [get_ports adc_s0] ; ## H13 FMC_HPC_LA07_P
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set_property -dict {PACKAGE_PIN AJ24 IOSTANDARD LVCMOS25} [get_ports adc_s1] ; ## H14 FMC_HPC_LA07_N
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set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVCMOS25} [get_ports adc_resetb] ; ## C10 FMC_HPC_LA06_P
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set_property -dict {PACKAGE_PIN AK17 IOSTANDARD LVCMOS25} [get_ports adc_agc1] ; ## H07 FMC_HPC_LA02_P
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set_property -dict {PACKAGE_PIN AK18 IOSTANDARD LVCMOS25} [get_ports adc_agc2] ; ## H08 FMC_HPC_LA02_N
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set_property -dict {PACKAGE_PIN AH19 IOSTANDARD LVCMOS25} [get_ports adc_agc3] ; ## G09 FMC_HPC_LA03_P
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set_property -dict {PACKAGE_PIN AJ19 IOSTANDARD LVCMOS25} [get_ports adc_agc4] ; ## G10 FMC_HPC_LA03_N
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# clocks
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create_clock -name rx_ref_clk -period 3.30 [get_ports rx_ref_clk_p]
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create_clock -name rx_div_clk -period 6.60 [get_pins i_system_wrapper/system_i/util_ad6676_xcvr/inst/i_xch_0/i_gtxe2_channel/RXOUTCLK]
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set_false_path -from [get_cells i_system_wrapper/system_i/axi_ad6676_jesd_rstgen/U0/PR_OUT_DFF[0].peripheral_reset_reg[0]]
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