Adrian Costina 908da60ab6 m2k: zed, changed constraints so they are the same with the ZED default configuration ... - the voltage can be physically changed between 1.8V, 2.5V and 3.3V		2017-02-27 14:13:34 +02:00
..
common	m2k: Add reset circuitry on the logic_analyzer clock domain	2017-02-13 12:02:11 +02:00
standalone	m2k: standalone, added explicit fclk_clk0 and fclk_clk1 constraints	2017-02-13 12:02:59 +02:00
zed	m2k: zed, changed constraints so they are the same with the ZED default configuration	2017-02-27 14:13:34 +02:00
Makefile	M2K: initial commit	2017-01-31 16:43:40 +02:00