961ebe0cc2
Deleted lines after endmodule and consecutive empty lines. Modified parentheses, extra spaces. Fixed indentation. Fixed parameters list to be each parameter on its line. Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com> |
||
---|---|---|
.. | ||
common | ||
zc706 | ||
zed | ||
Makefile | ||
Readme.md |
Readme.md
AD7616-SDZ HDL Project
Here are some pointers to help you:
- Board Product Page
- Parts : 16-Channel DAS with 16-Bit, Bipolar Input, Dual Simultaneous Sampling ADC
- Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad7616-sdz
- HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad7616-sdz
- Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad7606