Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline ... Deleted lines after endmodule and consecutive empty lines. Modified parentheses, extra spaces. Fixed indentation. Fixed parameters list to be each parameter on its line. Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>		2022-06-28 18:06:56 +03:00
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Makefile	Makefiles: Update header with the appropriate license	2021-09-16 16:50:53 +03:00
cmos_constr.xdc	adrv9001/zed: Update interface signal names based on direction	2020-08-28 13:23:00 +03:00
system_bd.tcl	adrv9001/zed: Use global clock buffers for better fit the design	2021-11-08 13:53:51 +02:00
system_constr.xdc	adrv9001/zed: Connect TDD sync to PMOD JA1	2021-01-20 13:00:01 +02:00
system_project.tcl	library: Move ad_iobuf to the common library, as it's not Xilinx specific	2020-11-02 16:13:35 +02:00
system_top.v	projects: Update .v files according to guideline	2022-06-28 18:06:56 +03:00