Adrian Costina 92aaf0bd51 FMCOMMS1: Updated projects and axi_ad9643 core ... ZC702: Removed invalid address segments. Changed the constraints for adc_clk to minimum possible value in order to meet timing. ZED: Change the constraints for adc_clk to minimum possible value, in order to meet timing AXI_AD9643: Corrected the number of bits in the adc_mon_data bus		2014-03-12 16:23:41 +02:00
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adv7511	Initial check in of VC707 base project	2014-03-10 17:26:17 +02:00
common	Merge branch 'master' of github.com:analogdevicesinc/hdl	2014-03-11 09:58:34 -04:00
fmcomms1	FMCOMMS1: Updated projects and axi_ad9643 core	2014-03-12 16:23:41 +02:00
fmcomms2	fmcomms2: added	2014-03-11 20:04:26 -04:00
scripts	global clock and reset names	2014-03-11 09:57:59 -04:00