Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline ... Deleted lines after endmodule and consecutive empty lines. Modified parentheses, extra spaces. Fixed indentation. Fixed parameters list to be each parameter on its line. Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>		2022-06-28 18:06:56 +03:00
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Makefile	ad9083: Add reference design for ad9083_a10soc	2022-03-28 16:04:38 +03:00
system_constr.sdc	ad9083: Add reference design for ad9083_a10soc	2022-03-28 16:04:38 +03:00
system_project.tcl	ad9083: Add reference design for ad9083_a10soc	2022-03-28 16:04:38 +03:00
system_qsys.tcl	ad9083: Add reference design for ad9083_a10soc	2022-03-28 16:04:38 +03:00
system_top.v	projects: Update .v files according to guideline	2022-06-28 18:06:56 +03:00