961ebe0cc2
Deleted lines after endmodule and consecutive empty lines. Modified parentheses, extra spaces. Fixed indentation. Fixed parameters list to be each parameter on its line. Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com> |
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Readme.md |
Readme.md
CN0363 HDL Project
Here are some pointers to help you:
- Board Product Page
- Parts : 24-Bit, 250 kSPS, Sigma-Delta ADC with 20 µs Settling and True Rail-to-Rail Buffers
- Project Doc: https://wiki.analog.com/resources/eval/user-guides/eval-cn0363-pmdz
- HDL Doc: https://wiki.analog.com/resources/eval/user-guides/eval-cn0363-pmdz/reference_hdl
- Linux Drivers: https://wiki.analog.com/resources/eval/user-guides/eval-cn0363-pmdz/software/linux/drivers