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AndreiGrozav 99412a503e library/scripts/*xilinx*: Auto-generate bd.tcl 
Having a bd.tcl script in every IP is redundant.

adi_ip.tcl:
 - add adi_init_bd_tcl - creates a blanch bd.tcl and a
parameters temporary_case_dependencies.mk when compiling an IP.
Its main purpose is to generate the bd.tcl, which will be included in
the IP's file-set.
 - adi_auto_fill_bd_tcl will populate the empty bd.tcl based on the
top IP parameters and the presence of these parameters in
auto_set_param_list and auto_set_param_list_overwritable lists.
This task can not be performed by the first described procedure since
the file-set is not yet defined.

adi_xilinx_device_info_enc.tcl:
Split auto_set_param_list_overwritable from auto_set_param_list. As
the name states, some of the parameters are overwritable, this will help
when generating the bd.tcl script.

library.mk:
Include the temporary_case_dependencies.mk if it exists in the
IP root folder. The mentioned *.mk file contains non generic
dependencies for makefiles like targets to clean.
 		2019-03-30 11:26:11 +02:00
library library/scripts/*xilinx*: Auto-generate bd.tcl 2019-03-30 11:26:11 +02:00
projects Remove deprecated/unused parameters 2019-03-30 11:26:11 +02:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Add generated files for Intel projects to .gitignore 2018-08-28 15:39:30 +02:00
LICENSE license: GPL must be GPL v2 2017-05-31 18:18:45 +03:00
LICENSE_ADIBSD license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_GPL2 license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_LGPL license: Add top level license files 2017-05-29 09:57:39 +03:00
Makefile Add quiet mode to the Makefile system 2018-04-11 15:09:54 +03:00
README.md README: Remove the Documentation section, it's redundant 2018-03-07 12:28:40 +00:00
quiet.mk quiet.mk: Fix newline generation in error message 2018-04-12 18:19:43 +02:00

README.md

HDL Reference Designs

Analog Devices Inc. HDL libraries and projects.

Getting started

This repository supports reference designs for different Analog Devices boards based on Intel and Xilinx FPGA development boards or standalone.

Prerequisites

or

Please make sure that you have the required tool version.

How to build a project

For building a projects, you have to use the GNU Make tool. If you're a Windows user please checkout this page, to see how you can install this tool.

To build a project, checkout the latest release, after that just cd to the project that you want to build and run make:

 [~]cd projects/fmcomms2/zc706
 [~]make

A more comprehensive build guide can be found under the following link: https://wiki.analog.com/resources/fpga/docs/build

Software

In general all the projects have no-OS (baremetal) and a Linux support. See no-OS or Linux for more information.

Which branch should I use?

  • If you want to use the most stable code base, always use the latest release branch.

  • If you want to use the greatest and latest, check out the master branch.

License

In this HDL repository, there are many different and unique modules, consisting of various HDL (Verilog or VHDL) components. The individual modules are developed independently, and may be accompanied by separate and unique license terms.

The user should read each of these license terms, and understand the freedoms and responsibilities that he or she has by using this source/core.

See LICENSE for more details. The separate license files cab be found here:

Comprehensive user guide

See HDL User Guide for a more detailed guide.

Support

Feel free to ask any question at EngineerZone.