Makefile
|
all: Rename altera to intel
|
2019-06-29 06:53:51 +03:00 |
align_mux.v
|
Add missing timescale annotations
|
2018-10-17 10:32:47 +03:00 |
elastic_buffer.v
|
Add missing timescale annotations
|
2018-10-17 10:32:47 +03:00 |
jesd204_rx_cgs.v
|
Add missing timescale annotations
|
2018-10-17 10:32:47 +03:00 |
jesd204_rx_ctrl.v
|
Add missing timescale annotations
|
2018-10-17 10:32:47 +03:00 |
jesd204_rx_ip.tcl
|
jesd204: support for 16 lanes
|
2019-11-28 16:17:21 +02:00 |
jesd204_rx_lane.v
|
Add missing timescale annotations
|
2018-10-17 10:32:47 +03:00 |