Adrian Costina 667e49fe41 library: Axi_clkgen, added register for controlling the source clock. ... Address is 0x11 /0x44. With the default value, 0, clock 1 is selected. If set to 1, clock 2 is selected		2015-11-25 11:16:32 +02:00
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Makefile	Makefile: Update Make files	2015-07-03 18:08:57 +03:00
axi_clkgen.v	library: Axi_clkgen, added register for controlling the source clock.	2015-11-25 11:16:32 +02:00
axi_clkgen_constr.xdc	library- drp moved to up clock	2015-06-01 13:39:26 -04:00
axi_clkgen_ip.tcl	axi_clkgen: Added a second input clock option	2015-11-06 17:55:29 +02:00