239 lines
7.2 KiB
ReStructuredText
Executable File
239 lines
7.2 KiB
ReStructuredText
Executable File
.. _ad469x_fmc:
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AD469X-FMC HDL project
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===============================================================================
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Overview
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-------------------------------------------------------------------------------
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The AD469X HDL reference design provides all the interfaces that are
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necessary to interact with the devices on the :adi:`EVAL-AD4696 <EVAL-AD4696>`
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board.
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The design has a SPI Engine instance to control and acquire data from the
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:adi:`AD4696` 16-bit precisions ADC, providing support to capture continuous
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samples at maximum sampling rate. Currently the design supports the Zedboard.
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Supported boards
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-------------------------------------------------------------------------------
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- :adi:`EVAL-AD4696 <EVAL-AD4696>`
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Supported devices
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-------------------------------------------------------------------------------
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- :adi:`AD4695`
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- :adi:`AD4696`
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- :adi:`AD4697`
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- :adi:`AD4698`
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Supported carriers
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-------------------------------------------------------------------------------
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- :xilinx:`ZedBoard <products/boards-and-kits/1-8dyf-11.html>` on FMC slot
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Block design
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-------------------------------------------------------------------------------
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The reference design uses the standard :ref:`SPI Engine Framework <spi_engine>`
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to interface the :adi:`AD4696` ADC in single SDO Mode. The :ref:`SPI Engine
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Offload module <spi_engine offload>`, which can be used to capture continuous
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data stream at maximum data rate, is triggered by the BUSY signal of the device.
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Block diagram
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The data path and clock domains are depicted in the below diagram:
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.. image:: ad469x_hdl.svg
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:width: 800
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:align: center
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:alt: AD469X_FMC block diagram
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CPU/Memory interconnects addresses
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The addresses are dependent on the architecture of the FPGA, having an offset
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added to the base address from HDL(see more at :ref:`architecture`).
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===================== ===========
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Instance Address
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===================== ===========
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axi_ad469x_dma 0x44A3_0000
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spi_clkgen 0x44A7_0000
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spi_ad469x_axi_regmap 0x44A0_0000
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ad469x_trigger_gen 0x44B0_0000
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===================== ===========
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I2C connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 20 20 20 20 20
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:header-rows: 1
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* - I2C type
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- I2C manager instance
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- Alias
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- Address
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- I2C subordinate
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* - PL
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- iic_fmc
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- axi_iic_fmc
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- 0x4162_0000
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- ---
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* - PL
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- iic_main
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- axi_iic_main
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- 0x4160_0000
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- ---
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SPI connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 1
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* - SPI type
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- SPI manager instance
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- SPI subordinate
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- CS
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* - PL
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- axi_spi_engine
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- ad469x
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- 0
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GPIOs
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The Software GPIO number is calculated as follows:
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- Zynq-7000: if PS7 is used, then offset is 54
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 2
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* - GPIO signal
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- Direction
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- HDL GPIO EMIO
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- Software GPIO
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* -
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- (from FPGA view)
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-
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- Zynq-7000
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* - ad469x_resetn
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- INOUT
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- 32
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- 86
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Interrupts
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Below are the Programmable Logic interrupts used in this project.
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================ === ========== ===========
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Instance name HDL Linux Zynq Actual Zynq
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================ === ========== ===========
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axi_ad469x_dma 13 57 89
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spi_ad469x 12 56 88
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================ === ========== ===========
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Building the HDL project
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-------------------------------------------------------------------------------
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The design is built upon ADI's generic HDL reference design framework.
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ADI does not distribute the bit/elf files of these projects so they must be
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built from the sources available :git-hdl:`here </>`. To get the source you must
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`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
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the HDL repository, and then build the project as follows:
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**Linux/Cygwin/WSL**
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.. code-block::
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:linenos:
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user@analog:~$ cd hdl/projects/ad469x_fmc/zed
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user@analog:~/hdl/projects/ad469x_fmc/zed$ make
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A more comprehensive build guide can be found in the :ref:`build_hdl` user guide.
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Resources
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-------------------------------------------------------------------------------
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Hardware related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Product datasheet:
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- :adi:`AD4695`/:adi:`AD4696`
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- :adi:`AD4697`/:adi:`AD4698`
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- `UG-1882, EVAL-AD4694FMCZ User Guide <https://www.analog.com/media/en/technical-documentation/user-guides/eval-ad4696fmcz-ug-1882.pdf>`__
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HDL related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-hdl:`AD469X_FMC HDL project source code <projects/ad469x_fmc>`
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.. list-table::
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:widths: 30 35 35
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:header-rows: 1
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* - IP name
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- Source code link
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- Documentation link
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* - AXI_CLKGEN
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- :git-hdl:`library/axi_dmac <library/axi_clkgen>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_clkgen>`
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* - AXI_DMAC
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- :git-hdl:`library/axi_dmac <library/axi_dmac>`
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- :ref:`here <axi_dmac>`
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* - AXI_HDMI_TX
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- :git-hdl:`library/axi_hdmi_tx <library/axi_hdmi_tx>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_hdmi_tx>`
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* - AXI_I2S_ADI
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- :git-hdl:`library/axi_i2s_adi <library/axi_i2s_adi>`
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- ---
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* - AXI_PWM_GEN
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- :git-hdl:`library/axi_pwm_gen <library/axi_pwm_gen>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_pwm_gen>`
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* - AXI_SPDIF_TX
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- :git-hdl:`library/axi_spdif_tx <library/axi_spdif_tx>`
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- ---
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* - AXI_SPI_ENGINE
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- :git-hdl:`library/spi_engine/axi_spi_engine <library/spi_engine/axi_spi_engine>`
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- :ref:`here <spi_engine axi>`
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* - AXI_SYSID
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- :git-hdl:`library/axi_sysid <library/axi_sysid>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
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* - SPI_ENGINE_EXECUTION
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- :git-hdl:`library/spi_engine/spi_engine_execution <library/spi_engine/spi_engine_execution>`
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- :ref:`here <spi_engine execution>`
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* - SPI_ENGINE_INTERCONNECT
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- :git-hdl:`library/spi_engine/spi_engine_interconnect <library/spi_engine/spi_engine_interconnect>`
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- :ref:`here <spi_engine interconnect>`
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* - SPI_ENGINE_OFFLOAD
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- :git-hdl:`library/spi_engine/spi_engine_offload <library/spi_engine/spi_engine_offload>`
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- :ref:`here <spi_engine offload>`
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* - SYSID_ROM
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- :git-hdl:`library/sysid_rom <library/sysid_rom>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
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* - UTIL_I2C_MIXER
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- :git-hdl:`library/util_i2c_mixer <library/util_i2c_mixer>`
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- :ref:`here <spi_engine offload>`
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- :ref:`SPI Engine Framework documentation <spi_engine>`
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Software related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-no-os:`AD469X_FMCZ No-OS project source code <projects/ad469x_fmcz>`
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- :dokuwiki:`How to build No-OS <resources/no-os/build>`
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.. include:: ../common/more_information.rst
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.. include:: ../common/support.rst
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