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Adrian Costina 9f8a94df69 axi_logic_analyzer: Streaming flag initial commit 
If the streaming bit is set, after the trigger condition is met
data will be continuosly captured by the DMA. The streaming bit
must be set to 0 to reset triggering.
 		2017-07-03 18:00:23 +03:00
library axi_logic_analyzer: Streaming flag initial commit 2017-07-03 18:00:23 +03:00
projects daq3: Provide DAC JESD204 lane mapping 2017-06-30 16:01:10 +02:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Update .gitignore 2016-12-19 15:37:05 +00:00
LICENSE license: GPL must be GPL v2 2017-05-31 18:18:45 +03:00
LICENSE_ADIBSD license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_GPL2 license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_LGPL license: Add top level license files 2017-05-29 09:57:39 +03:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update the README 2016-03-31 19:42:52 +03:00

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