8c08c5a65a
This change will fix the timing closure for designs where the external clock is not a submultiple of the s_axi_clk. Signed-off-by: AndreiGrozav <andrei.grozav@analog.com> |
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| .. | ||
| Makefile | ||
| axi_pwm_gen.sv | ||
| axi_pwm_gen_1.v | ||
| axi_pwm_gen_constr.sdc | ||
| axi_pwm_gen_constr.ttcl | ||
| axi_pwm_gen_hw.tcl | ||
| axi_pwm_gen_ip.tcl | ||
| axi_pwm_gen_regmap.sv | ||