3024 lines
136 KiB
XML
3024 lines
136 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<system name="$${FILENAME}">
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<component
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name="$${FILENAME}"
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displayName="$${FILENAME}"
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version="1.0"
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description=""
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tags=""
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categories="System" />
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<parameter name="bonusData"><![CDATA[bonusData
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{
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element $${FILENAME}
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element axi_ad9250_0
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{
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datum _sortIndex
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{
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value = "21";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element axi_ad9250_0.s_axi
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{
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datum baseAddress
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{
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value = "272695296";
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type = "String";
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}
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}
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element axi_ad9250_1
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{
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datum _sortIndex
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{
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value = "17";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element axi_ad9250_1.s_axi
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{
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datum baseAddress
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{
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value = "272760832";
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type = "String";
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}
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}
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element axi_dmac_0
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{
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datum _sortIndex
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{
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value = "19";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element axi_dmac_0.s_axi
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{
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datum baseAddress
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{
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value = "272842752";
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type = "String";
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}
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}
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element axi_dmac_1
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{
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datum _sortIndex
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{
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value = "15";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element axi_dmac_1.s_axi
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{
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datum baseAddress
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{
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value = "272826368";
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type = "String";
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}
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}
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element axi_jesd_xcvr
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{
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datum _sortIndex
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{
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value = "24";
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type = "int";
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}
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}
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element axi_jesd_xcvr.s_axi
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{
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datum baseAddress
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{
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value = "272629760";
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type = "String";
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}
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}
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element sys_clk
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{
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datum _sortIndex
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{
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value = "0";
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type = "int";
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}
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}
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element sys_cpu
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{
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datum _sortIndex
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{
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value = "2";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_cpu.debug_mem_slave
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{
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datum baseAddress
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{
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value = "272869376";
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type = "String";
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}
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}
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element sys_ddr3_cntrl
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{
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datum _sortIndex
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{
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value = "5";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_ddr3_cntrl.avl
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{
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datum _lockedAddress
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{
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value = "0";
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type = "boolean";
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}
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datum baseAddress
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{
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value = "0";
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type = "String";
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}
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}
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element sys_ethernet
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{
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datum _sortIndex
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{
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value = "6";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_ethernet.control_port
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{
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datum baseAddress
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{
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value = "272871424";
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type = "String";
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}
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}
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element sys_ethernet_dma_rx
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{
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datum _sortIndex
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{
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value = "7";
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type = "int";
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}
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}
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element sys_ethernet_dma_rx.csr
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{
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datum baseAddress
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{
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value = "272872576";
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type = "String";
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}
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}
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element sys_ethernet_dma_rx.descriptor_slave
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{
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datum baseAddress
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{
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value = "272872544";
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type = "String";
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}
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}
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element sys_ethernet_dma_rx.response
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{
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datum baseAddress
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{
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value = "272872672";
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type = "String";
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}
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}
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element sys_ethernet_dma_tx
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{
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datum _sortIndex
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{
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value = "8";
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type = "int";
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}
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}
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element sys_ethernet_dma_tx.csr
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{
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datum baseAddress
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{
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value = "272872608";
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type = "String";
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}
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}
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element sys_ethernet_dma_tx.descriptor_slave
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{
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datum baseAddress
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{
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value = "272872512";
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type = "String";
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}
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}
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element sys_gpio
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{
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datum _sortIndex
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{
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value = "13";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_gpio.s1
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{
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datum baseAddress
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{
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value = "272872656";
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type = "String";
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}
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}
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element sys_gpio_bd
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{
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datum _sortIndex
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{
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value = "12";
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type = "int";
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}
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}
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element sys_gpio_bd.s1
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{
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datum baseAddress
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{
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value = "272872640";
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type = "String";
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}
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}
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element sys_id
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{
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datum _sortIndex
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{
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value = "11";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_id.control_slave
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{
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datum baseAddress
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{
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value = "272872680";
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type = "String";
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}
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}
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element sys_int_mem
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{
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datum _sortIndex
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{
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value = "3";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_int_mem.s1
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{
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datum _lockedAddress
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{
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value = "0";
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type = "boolean";
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}
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datum baseAddress
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{
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value = "270532608";
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type = "String";
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}
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}
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element sys_pll
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{
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datum _sortIndex
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{
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value = "1";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_spi
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{
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datum _sortIndex
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{
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value = "14";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_spi.spi_control_port
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{
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datum baseAddress
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{
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value = "272872448";
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type = "String";
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}
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}
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element sys_tcm_mem
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{
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datum _sortIndex
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{
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value = "4";
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type = "int";
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}
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}
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element sys_tcm_mem.s1
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{
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datum baseAddress
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{
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value = "272863232";
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type = "String";
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}
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}
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element sys_timer
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{
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datum _sortIndex
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{
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value = "10";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_timer.s1
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{
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datum baseAddress
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{
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value = "272872480";
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type = "String";
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}
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}
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element sys_uart
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{
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datum _sortIndex
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{
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value = "9";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_uart.avalon_jtag_slave
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{
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datum baseAddress
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{
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value = "272872688";
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type = "String";
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}
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}
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element sys_xcvr
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{
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datum _sortIndex
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{
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value = "25";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_xcvr.jesd204_rx_avs
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{
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datum baseAddress
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{
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value = "0";
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type = "String";
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}
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}
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element sys_xcvr_rstcntrl
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{
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datum _sortIndex
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{
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value = "26";
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type = "int";
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}
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}
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element sys_xcvr_rx_clk
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{
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datum _sortIndex
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{
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value = "27";
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type = "int";
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}
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datum sopceditor_expanded
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{
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value = "1";
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type = "boolean";
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}
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}
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element sys_xcvr_rx_ref_clk
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{
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datum _sortIndex
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{
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value = "28";
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type = "int";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria V";
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type = "String";
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}
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}
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element util_bsplit
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{
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datum _sortIndex
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{
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value = "23";
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type = "int";
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}
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}
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element util_cpack_0
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{
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datum _sortIndex
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{
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value = "20";
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type = "int";
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}
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}
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element util_cpack_1
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{
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datum _sortIndex
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{
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value = "16";
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type = "int";
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}
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}
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element util_jesd_align_0
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{
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datum _sortIndex
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{
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value = "22";
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type = "int";
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}
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}
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element util_jesd_align_1
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{
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datum _sortIndex
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{
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value = "18";
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type = "int";
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}
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}
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}
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="FIFO" />
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<parameter name="device" value="5AGTFD7K3F40I3" />
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<parameter name="deviceFamily" value="Arria V" />
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<parameter name="deviceSpeedGrade" value="3_H3" />
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<parameter name="fabricMode" value="QSYS" />
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<parameter name="generateLegacySim" value="false" />
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<parameter name="generationId" value="0" />
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<parameter name="globalResetBus" value="false" />
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<parameter name="hdlLanguage" value="VERILOG" />
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<parameter name="hideFromIPCatalog" value="false" />
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<parameter name="lockedInterfaceDefinition" value="" />
|
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<parameter name="maxAdditionalLatency" value="2" />
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<parameter name="projectName">fmcjesdadc1_a5gt.qpf</parameter>
|
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<parameter name="sopcBorderPoints" value="false" />
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<parameter name="systemHash" value="0" />
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<parameter name="testBenchDutName" value="" />
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<parameter name="timeStamp" value="0" />
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<parameter name="useTestBenchNamingPattern" value="false" />
|
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<instanceScript></instanceScript>
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<interface name="axi_ad9250_0_adc_clock" internal="axi_ad9250_0.adc_clock" />
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<interface name="axi_ad9250_0_adc_dma_if" internal="axi_ad9250_0.adc_dma_if" />
|
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<interface name="axi_ad9250_0_adc_mon_if" internal="axi_ad9250_0.adc_mon_if" />
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<interface name="axi_ad9250_0_xcvr_clk" internal="axi_ad9250_0.xcvr_clk" />
|
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<interface name="axi_ad9250_0_xcvr_data" internal="axi_ad9250_0.xcvr_data" />
|
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<interface name="axi_ad9250_1_adc_clock" internal="axi_ad9250_1.adc_clock" />
|
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<interface name="axi_ad9250_1_adc_dma_if" internal="axi_ad9250_1.adc_dma_if" />
|
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<interface name="axi_ad9250_1_adc_mon_if" internal="axi_ad9250_1.adc_mon_if" />
|
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<interface name="axi_ad9250_1_xcvr_clk" internal="axi_ad9250_1.xcvr_clk" />
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<interface name="axi_ad9250_1_xcvr_data" internal="axi_ad9250_1.xcvr_data" />
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<interface name="axi_dmac_0_fifo_wr_clock" internal="axi_dmac_0.fifo_wr_clock" />
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<interface name="axi_dmac_0_fifo_wr_if" internal="axi_dmac_0.fifo_wr_if" />
|
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<interface name="axi_dmac_1_fifo_wr_clock" internal="axi_dmac_1.fifo_wr_clock" />
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<interface name="axi_dmac_1_fifo_wr_if" internal="axi_dmac_1.fifo_wr_if" />
|
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<interface
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name="rx_data"
|
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internal="sys_xcvr.rx_serial_data"
|
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type="conduit"
|
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dir="end" />
|
|
<interface
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name="rx_ip_sysref"
|
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internal="sys_xcvr.sysref"
|
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type="conduit"
|
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dir="end" />
|
|
<interface
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name="rx_ref_clk"
|
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internal="sys_xcvr_rx_ref_clk.clk_in"
|
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type="clock"
|
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dir="end" />
|
|
<interface
|
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name="rx_sync"
|
|
internal="axi_jesd_xcvr.if_rx_sync"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="rx_sysref"
|
|
internal="axi_jesd_xcvr.if_rx_sysref"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_125m_clk"
|
|
internal="sys_pll.outclk0"
|
|
type="clock"
|
|
dir="start" />
|
|
<interface
|
|
name="sys_25m_clk"
|
|
internal="sys_pll.outclk1"
|
|
type="clock"
|
|
dir="start" />
|
|
<interface
|
|
name="sys_2m5_clk"
|
|
internal="sys_pll.outclk2"
|
|
type="clock"
|
|
dir="start" />
|
|
<interface name="sys_clk" internal="sys_clk.clk_in" type="clock" dir="end" />
|
|
<interface
|
|
name="sys_ddr3_oct"
|
|
internal="sys_ddr3_cntrl.oct"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_ddr3_phy"
|
|
internal="sys_ddr3_cntrl.memory"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_ethernet_mdio"
|
|
internal="sys_ethernet.mac_mdio_connection"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_ethernet_rgmii"
|
|
internal="sys_ethernet.mac_rgmii_connection"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_ethernet_rx_clk"
|
|
internal="sys_ethernet.pcs_mac_rx_clock_connection"
|
|
type="clock"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_ethernet_status"
|
|
internal="sys_ethernet.mac_status_connection"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_ethernet_tx_clk"
|
|
internal="sys_ethernet.pcs_mac_tx_clock_connection"
|
|
type="clock"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_gpio"
|
|
internal="sys_gpio.external_connection"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_gpio_bd"
|
|
internal="sys_gpio_bd.external_connection"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_pll_locked"
|
|
internal="sys_pll.locked"
|
|
type="conduit"
|
|
dir="end" />
|
|
<interface
|
|
name="sys_reset"
|
|
internal="sys_clk.clk_in_reset"
|
|
type="reset"
|
|
dir="end" />
|
|
<interface name="sys_spi" internal="sys_spi.external" type="conduit" dir="end" />
|
|
<module name="axi_ad9250_0" kind="axi_ad9250" version="1.0" enabled="1">
|
|
<parameter name="PCORE_DEVICE_TYPE" value="0" />
|
|
<parameter name="PCORE_ID" value="0" />
|
|
</module>
|
|
<module name="axi_ad9250_1" kind="axi_ad9250" version="1.0" enabled="1">
|
|
<parameter name="PCORE_DEVICE_TYPE" value="0" />
|
|
<parameter name="PCORE_ID" value="1" />
|
|
</module>
|
|
<module name="axi_dmac_0" kind="axi_dmac" version="1.0" enabled="1">
|
|
<parameter name="C_2D_TRANSFER" value="1" />
|
|
<parameter name="C_AXI_SLICE_DEST" value="0" />
|
|
<parameter name="C_AXI_SLICE_SRC" value="0" />
|
|
<parameter name="C_CLKS_ASYNC_DEST_REQ" value="1" />
|
|
<parameter name="C_CLKS_ASYNC_REQ_SRC" value="1" />
|
|
<parameter name="C_CLKS_ASYNC_SRC_DEST" value="1" />
|
|
<parameter name="C_CYCLIC" value="1" />
|
|
<parameter name="C_DMA_DATA_WIDTH_DEST" value="64" />
|
|
<parameter name="C_DMA_DATA_WIDTH_SRC" value="64" />
|
|
<parameter name="C_DMA_LENGTH_WIDTH" value="14" />
|
|
<parameter name="C_DMA_TYPE_DEST" value="0" />
|
|
<parameter name="C_DMA_TYPE_SRC" value="2" />
|
|
<parameter name="C_SYNC_TRANSFER_START" value="0" />
|
|
<parameter name="PCORE_ID" value="0" />
|
|
</module>
|
|
<module name="axi_dmac_1" kind="axi_dmac" version="1.0" enabled="1">
|
|
<parameter name="C_2D_TRANSFER" value="1" />
|
|
<parameter name="C_AXI_SLICE_DEST" value="0" />
|
|
<parameter name="C_AXI_SLICE_SRC" value="0" />
|
|
<parameter name="C_CLKS_ASYNC_DEST_REQ" value="1" />
|
|
<parameter name="C_CLKS_ASYNC_REQ_SRC" value="1" />
|
|
<parameter name="C_CLKS_ASYNC_SRC_DEST" value="1" />
|
|
<parameter name="C_CYCLIC" value="1" />
|
|
<parameter name="C_DMA_DATA_WIDTH_DEST" value="64" />
|
|
<parameter name="C_DMA_DATA_WIDTH_SRC" value="64" />
|
|
<parameter name="C_DMA_LENGTH_WIDTH" value="14" />
|
|
<parameter name="C_DMA_TYPE_DEST" value="0" />
|
|
<parameter name="C_DMA_TYPE_SRC" value="2" />
|
|
<parameter name="C_SYNC_TRANSFER_START" value="0" />
|
|
<parameter name="PCORE_ID" value="1" />
|
|
</module>
|
|
<module name="axi_jesd_xcvr" kind="axi_jesd_xcvr" version="1.0" enabled="1">
|
|
<parameter name="PCORE_DEVICE_TYPE" value="0" />
|
|
<parameter name="PCORE_ID" value="0" />
|
|
<parameter name="PCORE_NUM_OF_RX_LANES" value="4" />
|
|
<parameter name="PCORE_NUM_OF_TX_LANES" value="4" />
|
|
</module>
|
|
<module name="sys_clk" kind="clock_source" version="15.0" enabled="1">
|
|
<parameter name="clockFrequency" value="100000000" />
|
|
<parameter name="clockFrequencyKnown" value="true" />
|
|
<parameter name="inputClockFrequency" value="0" />
|
|
<parameter name="resetSynchronousEdges" value="NONE" />
|
|
</module>
|
|
<module name="sys_cpu" kind="altera_nios2_gen2" version="15.0" enabled="1">
|
|
<parameter name="AUTO_CLK_CLOCK_DOMAIN" value="5" />
|
|
<parameter name="AUTO_CLK_RESET_DOMAIN" value="5" />
|
|
<parameter name="AUTO_DEVICE" value="5AGTFD7K3F40I3" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
|
|
<parameter name="bht_ramBlockType" value="Automatic" />
|
|
<parameter name="breakOffset" value="32" />
|
|
<parameter name="breakSlave">sys_cpu.jtag_debug_module</parameter>
|
|
<parameter name="cdx_enabled" value="false" />
|
|
<parameter name="clockFrequency" value="100000000" />
|
|
<parameter name="cpuArchRev" value="1" />
|
|
<parameter name="cpuID" value="0" />
|
|
<parameter name="cpuReset" value="false" />
|
|
<parameter name="customInstSlavesSystemInfo" value="<info/>" />
|
|
<parameter name="customInstSlavesSystemInfo_nios_a" value="<info/>" />
|
|
<parameter name="customInstSlavesSystemInfo_nios_b" value="<info/>" />
|
|
<parameter name="customInstSlavesSystemInfo_nios_c" value="<info/>" />
|
|
<parameter name="dataAddrWidth" value="29" />
|
|
<parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
|
|
<parameter name="dataMasterHighPerformanceMapParam" value="" />
|
|
<parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.avl' start='0x0' end='0x10000000' /><slave name='sys_int_mem.s1' start='0x10200000' end='0x10400000' /><slave name='axi_jesd_xcvr.s_axi' start='0x10400000' end='0x10410000' /><slave name='axi_ad9250_0.s_axi' start='0x10410000' end='0x10420000' /><slave name='axi_ad9250_1.s_axi' start='0x10420000' end='0x10430000' /><slave name='axi_dmac_1.s_axi' start='0x10430000' end='0x10434000' /><slave name='axi_dmac_0.s_axi' start='0x10434000' end='0x10438000' /><slave name='sys_cpu.debug_mem_slave' start='0x1043A800' end='0x1043B000' /><slave name='sys_ethernet.control_port' start='0x1043B000' end='0x1043B400' /><slave name='sys_spi.spi_control_port' start='0x1043B400' end='0x1043B420' /><slave name='sys_timer.s1' start='0x1043B420' end='0x1043B440' /><slave name='sys_ethernet_dma_tx.descriptor_slave' start='0x1043B440' end='0x1043B460' /><slave name='sys_ethernet_dma_rx.descriptor_slave' start='0x1043B460' end='0x1043B480' /><slave name='sys_ethernet_dma_rx.csr' start='0x1043B480' end='0x1043B4A0' /><slave name='sys_ethernet_dma_tx.csr' start='0x1043B4A0' end='0x1043B4C0' /><slave name='sys_gpio_bd.s1' start='0x1043B4C0' end='0x1043B4D0' /><slave name='sys_gpio.s1' start='0x1043B4D0' end='0x1043B4E0' /><slave name='sys_ethernet_dma_rx.response' start='0x1043B4E0' end='0x1043B4E8' /><slave name='sys_id.control_slave' start='0x1043B4E8' end='0x1043B4F0' /><slave name='sys_uart.avalon_jtag_slave' start='0x1043B4F0' end='0x1043B4F8' /></address-map>]]></parameter>
|
|
<parameter name="data_master_high_performance_paddr_base" value="0" />
|
|
<parameter name="data_master_high_performance_paddr_size" value="0" />
|
|
<parameter name="data_master_paddr_base" value="0" />
|
|
<parameter name="data_master_paddr_size" value="0" />
|
|
<parameter name="dcache_bursts" value="false" />
|
|
<parameter name="dcache_numTCDM" value="1" />
|
|
<parameter name="dcache_ramBlockType" value="Automatic" />
|
|
<parameter name="dcache_size" value="32768" />
|
|
<parameter name="dcache_tagramBlockType" value="Automatic" />
|
|
<parameter name="dcache_victim_buf_impl" value="ram" />
|
|
<parameter name="debug_OCIOnchipTrace" value="_128" />
|
|
<parameter name="debug_assignJtagInstanceID" value="false" />
|
|
<parameter name="debug_datatrigger" value="0" />
|
|
<parameter name="debug_debugReqSignals" value="false" />
|
|
<parameter name="debug_enabled" value="true" />
|
|
<parameter name="debug_hwbreakpoint" value="0" />
|
|
<parameter name="debug_jtagInstanceID" value="0" />
|
|
<parameter name="debug_traceStorage" value="onchip_trace" />
|
|
<parameter name="debug_traceType" value="none" />
|
|
<parameter name="debug_triggerArming" value="true" />
|
|
<parameter name="deviceFamilyName" value="Arria V" />
|
|
<parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
|
|
<parameter name="dividerType" value="no_div" />
|
|
<parameter name="exceptionOffset" value="32" />
|
|
<parameter name="exceptionSlave" value="sys_ddr3_cntrl.avl" />
|
|
<parameter name="faAddrWidth" value="1" />
|
|
<parameter name="faSlaveMapParam" value="" />
|
|
<parameter name="fa_cache_line" value="2" />
|
|
<parameter name="fa_cache_linesize" value="0" />
|
|
<parameter name="flash_instruction_master_paddr_base" value="0" />
|
|
<parameter name="flash_instruction_master_paddr_size" value="0" />
|
|
<parameter name="icache_burstType" value="None" />
|
|
<parameter name="icache_numTCIM" value="1" />
|
|
<parameter name="icache_ramBlockType" value="Automatic" />
|
|
<parameter name="icache_size" value="32768" />
|
|
<parameter name="icache_tagramBlockType" value="Automatic" />
|
|
<parameter name="impl" value="Fast" />
|
|
<parameter name="instAddrWidth" value="29" />
|
|
<parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.avl' start='0x0' end='0x10000000' /><slave name='sys_int_mem.s1' start='0x10200000' end='0x10400000' /><slave name='sys_cpu.debug_mem_slave' start='0x1043A800' end='0x1043B000' /></address-map>]]></parameter>
|
|
<parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
|
|
<parameter name="instructionMasterHighPerformanceMapParam" value="" />
|
|
<parameter name="instruction_master_high_performance_paddr_base" value="0" />
|
|
<parameter name="instruction_master_high_performance_paddr_size" value="0" />
|
|
<parameter name="instruction_master_paddr_base" value="0" />
|
|
<parameter name="instruction_master_paddr_size" value="0" />
|
|
<parameter name="internalIrqMaskSystemInfo" value="511" />
|
|
<parameter name="io_regionbase" value="0" />
|
|
<parameter name="io_regionsize" value="0" />
|
|
<parameter name="master_addr_map" value="false" />
|
|
<parameter name="mmu_TLBMissExcOffset" value="4096" />
|
|
<parameter name="mmu_TLBMissExcSlave" value="sys_ddr3_cntrl.avl" />
|
|
<parameter name="mmu_autoAssignTlbPtrSz" value="false" />
|
|
<parameter name="mmu_enabled" value="false" />
|
|
<parameter name="mmu_processIDNumBits" value="8" />
|
|
<parameter name="mmu_ramBlockType" value="Automatic" />
|
|
<parameter name="mmu_tlbNumWays" value="16" />
|
|
<parameter name="mmu_tlbPtrSz" value="7" />
|
|
<parameter name="mmu_udtlbNumEntries" value="6" />
|
|
<parameter name="mmu_uitlbNumEntries" value="4" />
|
|
<parameter name="mpu_enabled" value="false" />
|
|
<parameter name="mpu_minDataRegionSize" value="12" />
|
|
<parameter name="mpu_minInstRegionSize" value="12" />
|
|
<parameter name="mpu_numOfDataRegion" value="8" />
|
|
<parameter name="mpu_numOfInstRegion" value="8" />
|
|
<parameter name="mpu_useLimit" value="false" />
|
|
<parameter name="mpx_enabled" value="false" />
|
|
<parameter name="mul_32_impl" value="3" />
|
|
<parameter name="mul_64_impl" value="0" />
|
|
<parameter name="mul_shift_choice" value="0" />
|
|
<parameter name="ocimem_ramBlockType" value="Automatic" />
|
|
<parameter name="ocimem_ramInit" value="false" />
|
|
<parameter name="regfile_ramBlockType" value="Automatic" />
|
|
<parameter name="resetOffset" value="0" />
|
|
<parameter name="resetSlave" value="sys_ddr3_cntrl.avl" />
|
|
<parameter name="resetrequest_enabled" value="true" />
|
|
<parameter name="setting_HBreakTest" value="false" />
|
|
<parameter name="setting_HDLSimCachesCleared" value="true" />
|
|
<parameter name="setting_activateMonitors" value="true" />
|
|
<parameter name="setting_activateTestEndChecker" value="false" />
|
|
<parameter name="setting_activateTrace" value="true" />
|
|
<parameter name="setting_allow_break_inst" value="false" />
|
|
<parameter name="setting_alwaysEncrypt" value="true" />
|
|
<parameter name="setting_asic_add_scan_mode_input" value="false" />
|
|
<parameter name="setting_asic_enabled" value="false" />
|
|
<parameter name="setting_asic_synopsys_translate_on_off" value="false" />
|
|
<parameter name="setting_asic_third_party_synthesis" value="false" />
|
|
<parameter name="setting_avalonDebugPortPresent" value="false" />
|
|
<parameter name="setting_bhtPtrSz" value="8" />
|
|
<parameter name="setting_bigEndian" value="false" />
|
|
<parameter name="setting_branchpredictiontype" value="Dynamic" />
|
|
<parameter name="setting_breakslaveoveride" value="false" />
|
|
<parameter name="setting_clearXBitsLDNonBypass" value="true" />
|
|
<parameter name="setting_dc_ecc_present" value="false" />
|
|
<parameter name="setting_disable_tmr_inj" value="false" />
|
|
<parameter name="setting_disableocitrace" value="false" />
|
|
<parameter name="setting_dtcm_ecc_present" value="false" />
|
|
<parameter name="setting_ecc_present" value="false" />
|
|
<parameter name="setting_ecc_sim_test_ports" value="false" />
|
|
<parameter name="setting_exportHostDebugPort" value="false" />
|
|
<parameter name="setting_exportPCB" value="false" />
|
|
<parameter name="setting_export_large_RAMs" value="false" />
|
|
<parameter name="setting_exportdebuginfo" value="false" />
|
|
<parameter name="setting_exportvectors" value="false" />
|
|
<parameter name="setting_fast_register_read" value="false" />
|
|
<parameter name="setting_ic_ecc_present" value="true" />
|
|
<parameter name="setting_interruptControllerType" value="Internal" />
|
|
<parameter name="setting_itcm_ecc_present" value="false" />
|
|
<parameter name="setting_mmu_ecc_present" value="true" />
|
|
<parameter name="setting_oci_export_jtag_signals" value="false" />
|
|
<parameter name="setting_oci_version" value="1" />
|
|
<parameter name="setting_preciseIllegalMemAccessException" value="false" />
|
|
<parameter name="setting_removeRAMinit" value="false" />
|
|
<parameter name="setting_rf_ecc_present" value="true" />
|
|
<parameter name="setting_shadowRegisterSets" value="0" />
|
|
<parameter name="setting_showInternalSettings" value="false" />
|
|
<parameter name="setting_showUnpublishedSettings" value="false" />
|
|
<parameter name="setting_support31bitdcachebypass" value="true" />
|
|
<parameter name="setting_usedesignware" value="false" />
|
|
<parameter name="shift_rot_impl" value="0" />
|
|
<parameter name="tightlyCoupledDataMaster0AddrWidth" value="29" />
|
|
<parameter name="tightlyCoupledDataMaster0MapParam"><![CDATA[<address-map><slave name='sys_tcm_mem.s1' start='0x10439000' end='0x1043A000' /></address-map>]]></parameter>
|
|
<parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledDataMaster1MapParam" value="" />
|
|
<parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledDataMaster2MapParam" value="" />
|
|
<parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledDataMaster3MapParam" value="" />
|
|
<parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="29" />
|
|
<parameter name="tightlyCoupledInstructionMaster0MapParam"><![CDATA[<address-map><slave name='sys_tcm_mem.s1' start='0x10439000' end='0x1043A000' /></address-map>]]></parameter>
|
|
<parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
|
|
<parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
|
|
<parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
|
|
<parameter name="tightly_coupled_data_master_0_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_data_master_0_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_data_master_1_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_data_master_1_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_data_master_2_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_data_master_2_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_data_master_3_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_data_master_3_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_0_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_1_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_2_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_3_paddr_size" value="0" />
|
|
<parameter name="tmr_enabled" value="false" />
|
|
<parameter name="tracefilename" value="" />
|
|
<parameter name="userDefinedSettings" value="" />
|
|
</module>
|
|
<module
|
|
name="sys_ddr3_cntrl"
|
|
kind="altera_mem_if_ddr3_emif"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="ABSTRACT_REAL_COMPARE_TEST" value="false" />
|
|
<parameter name="ABS_RAM_MEM_INIT_FILENAME" value="meminit" />
|
|
<parameter name="ACV_PHY_CLK_ADD_FR_PHASE" value="0.0" />
|
|
<parameter name="AC_PACKAGE_DESKEW" value="false" />
|
|
<parameter name="AC_ROM_USER_ADD_0" value="0_0000_0000_0000" />
|
|
<parameter name="AC_ROM_USER_ADD_1" value="0_0000_0000_1000" />
|
|
<parameter name="ADDR_ORDER" value="0" />
|
|
<parameter name="ADD_EFFICIENCY_MONITOR" value="false" />
|
|
<parameter name="ADD_EXTERNAL_SEQ_DEBUG_NIOS" value="false" />
|
|
<parameter name="ADVANCED_CK_PHASES" value="false" />
|
|
<parameter name="ADVERTIZE_SEQUENCER_SW_BUILD_FILES" value="false" />
|
|
<parameter name="AFI_DEBUG_INFO_WIDTH" value="32" />
|
|
<parameter name="ALTMEMPHY_COMPATIBLE_MODE" value="false" />
|
|
<parameter name="AP_MODE" value="false" />
|
|
<parameter name="AP_MODE_EN" value="0" />
|
|
<parameter name="AUTO_DEVICE" value="5AGTFD7K3F40I3" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
|
|
<parameter name="AUTO_PD_CYCLES" value="0" />
|
|
<parameter name="AUTO_POWERDN_EN" value="false" />
|
|
<parameter name="AVL_DATA_WIDTH_PORT" value="32,32,32,32,32,32" />
|
|
<parameter name="AVL_MAX_SIZE" value="256" />
|
|
<parameter name="BYTE_ENABLE" value="true" />
|
|
<parameter name="C2P_WRITE_CLOCK_ADD_PHASE" value="0.0" />
|
|
<parameter name="CALIBRATION_MODE" value="Skip" />
|
|
<parameter name="CALIB_REG_WIDTH" value="8" />
|
|
<parameter name="CFG_DATA_REORDERING_TYPE" value="INTER_BANK" />
|
|
<parameter name="CFG_REORDER_DATA" value="true" />
|
|
<parameter name="CFG_TCCD_NS" value="2.5" />
|
|
<parameter name="COMMAND_PHASE" value="0.0" />
|
|
<parameter name="CONTROLLER_LATENCY" value="5" />
|
|
<parameter name="CORE_DEBUG_CONNECTION" value="EXPORT" />
|
|
<parameter name="CPORT_TYPE_PORT">Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional</parameter>
|
|
<parameter name="CTL_AUTOPCH_EN" value="false" />
|
|
<parameter name="CTL_CMD_QUEUE_DEPTH" value="8" />
|
|
<parameter name="CTL_CSR_CONNECTION" value="INTERNAL_JTAG" />
|
|
<parameter name="CTL_CSR_ENABLED" value="false" />
|
|
<parameter name="CTL_CSR_READ_ONLY" value="1" />
|
|
<parameter name="CTL_DEEP_POWERDN_EN" value="false" />
|
|
<parameter name="CTL_DYNAMIC_BANK_ALLOCATION" value="false" />
|
|
<parameter name="CTL_DYNAMIC_BANK_NUM" value="4" />
|
|
<parameter name="CTL_ECC_AUTO_CORRECTION_ENABLED" value="false" />
|
|
<parameter name="CTL_ECC_ENABLED" value="false" />
|
|
<parameter name="CTL_ENABLE_BURST_INTERRUPT" value="false" />
|
|
<parameter name="CTL_ENABLE_BURST_TERMINATE" value="false" />
|
|
<parameter name="CTL_HRB_ENABLED" value="false" />
|
|
<parameter name="CTL_LOOK_AHEAD_DEPTH" value="4" />
|
|
<parameter name="CTL_SELF_REFRESH_EN" value="false" />
|
|
<parameter name="CTL_USR_REFRESH_EN" value="false" />
|
|
<parameter name="CTL_ZQCAL_EN" value="false" />
|
|
<parameter name="CUT_NEW_FAMILY_TIMING" value="true" />
|
|
<parameter name="DAT_DATA_WIDTH" value="32" />
|
|
<parameter name="DEBUG_MODE" value="false" />
|
|
<parameter name="DEVICE_DEPTH" value="1" />
|
|
<parameter name="DEVICE_FAMILY_PARAM" value="" />
|
|
<parameter name="DISABLE_CHILD_MESSAGING" value="false" />
|
|
<parameter name="DISCRETE_FLY_BY" value="true" />
|
|
<parameter name="DLL_SHARING_MODE" value="None" />
|
|
<parameter name="DQS_DQSN_MODE" value="DIFFERENTIAL" />
|
|
<parameter name="DQ_INPUT_REG_USE_CLKN" value="false" />
|
|
<parameter name="DUPLICATE_AC" value="false" />
|
|
<parameter name="ED_EXPORT_SEQ_DEBUG" value="false" />
|
|
<parameter name="ENABLE_ABS_RAM_MEM_INIT" value="false" />
|
|
<parameter name="ENABLE_BONDING" value="false" />
|
|
<parameter name="ENABLE_BURST_MERGE" value="false" />
|
|
<parameter name="ENABLE_CTRL_AVALON_INTERFACE" value="true" />
|
|
<parameter name="ENABLE_DELAY_CHAIN_WRITE" value="false" />
|
|
<parameter name="ENABLE_EMIT_BFM_MASTER" value="false" />
|
|
<parameter name="ENABLE_EXPORT_SEQ_DEBUG_BRIDGE" value="false" />
|
|
<parameter name="ENABLE_EXTRA_REPORTING" value="false" />
|
|
<parameter name="ENABLE_ISS_PROBES" value="false" />
|
|
<parameter name="ENABLE_NON_DESTRUCTIVE_CALIB" value="false" />
|
|
<parameter name="ENABLE_NON_DES_CAL" value="false" />
|
|
<parameter name="ENABLE_NON_DES_CAL_TEST" value="false" />
|
|
<parameter name="ENABLE_SEQUENCER_MARGINING_ON_BY_DEFAULT" value="false" />
|
|
<parameter name="ENABLE_USER_ECC" value="false" />
|
|
<parameter name="EXPORT_AFI_HALF_CLK" value="false" />
|
|
<parameter name="EXTRA_SETTINGS" value="" />
|
|
<parameter name="FORCED_NON_LDC_ADDR_CMD_MEM_CK_INVERT" value="false" />
|
|
<parameter name="FORCED_NUM_WRITE_FR_CYCLE_SHIFTS" value="0" />
|
|
<parameter name="FORCE_DQS_TRACKING" value="AUTO" />
|
|
<parameter name="FORCE_MAX_LATENCY_COUNT_WIDTH" value="0" />
|
|
<parameter name="FORCE_SEQUENCER_TCL_DEBUG_MODE" value="false" />
|
|
<parameter name="FORCE_SHADOW_REGS" value="AUTO" />
|
|
<parameter name="FORCE_SYNTHESIS_LANGUAGE" value="" />
|
|
<parameter name="HARD_EMIF" value="false" />
|
|
<parameter name="HCX_COMPAT_MODE" value="false" />
|
|
<parameter name="HHP_HPS" value="false" />
|
|
<parameter name="HHP_HPS_SIMULATION" value="false" />
|
|
<parameter name="HHP_HPS_VERIFICATION" value="false" />
|
|
<parameter name="HPS_PROTOCOL" value="DEFAULT" />
|
|
<parameter name="INCLUDE_BOARD_DELAY_MODEL" value="false" />
|
|
<parameter name="INCLUDE_MULTIRANK_BOARD_DELAY_MODEL" value="false" />
|
|
<parameter name="IS_ES_DEVICE" value="false" />
|
|
<parameter name="LOCAL_ID_WIDTH" value="8" />
|
|
<parameter name="LRDIMM_EXTENDED_CONFIG" value="0x0" />
|
|
<parameter name="MARGIN_VARIATION_TEST" value="false" />
|
|
<parameter name="MAX_PENDING_RD_CMD" value="32" />
|
|
<parameter name="MAX_PENDING_WR_CMD" value="16" />
|
|
<parameter name="MEM_ASR" value="Manual" />
|
|
<parameter name="MEM_ATCL" value="Disabled" />
|
|
<parameter name="MEM_AUTO_LEVELING_MODE" value="true" />
|
|
<parameter name="MEM_BANKADDR_WIDTH" value="3" />
|
|
<parameter name="MEM_BL" value="OTF" />
|
|
<parameter name="MEM_BT" value="Sequential" />
|
|
<parameter name="MEM_CK_PHASE" value="0.0" />
|
|
<parameter name="MEM_CK_WIDTH" value="1" />
|
|
<parameter name="MEM_CLK_EN_WIDTH" value="1" />
|
|
<parameter name="MEM_CLK_FREQ" value="400.0" />
|
|
<parameter name="MEM_CLK_FREQ_MAX" value="666.667" />
|
|
<parameter name="MEM_COL_ADDR_WIDTH" value="10" />
|
|
<parameter name="MEM_CS_WIDTH" value="1" />
|
|
<parameter name="MEM_DEVICE" value="MISSING_MODEL" />
|
|
<parameter name="MEM_DLL_EN" value="true" />
|
|
<parameter name="MEM_DQ_PER_DQS" value="8" />
|
|
<parameter name="MEM_DQ_WIDTH" value="64" />
|
|
<parameter name="MEM_DRV_STR" value="RZQ/6" />
|
|
<parameter name="MEM_FORMAT" value="DISCRETE" />
|
|
<parameter name="MEM_GUARANTEED_WRITE_INIT" value="false" />
|
|
<parameter name="MEM_IF_BOARD_BASE_DELAY" value="10" />
|
|
<parameter name="MEM_IF_DM_PINS_EN" value="true" />
|
|
<parameter name="MEM_IF_DQSN_EN" value="true" />
|
|
<parameter name="MEM_IF_SIM_VALID_WINDOW" value="0" />
|
|
<parameter name="MEM_INIT_EN" value="false" />
|
|
<parameter name="MEM_INIT_FILE" value="" />
|
|
<parameter name="MEM_MIRROR_ADDRESSING" value="0" />
|
|
<parameter name="MEM_NUMBER_OF_DIMMS" value="1" />
|
|
<parameter name="MEM_NUMBER_OF_RANKS_PER_DEVICE" value="1" />
|
|
<parameter name="MEM_NUMBER_OF_RANKS_PER_DIMM" value="1" />
|
|
<parameter name="MEM_PD" value="DLL off" />
|
|
<parameter name="MEM_RANK_MULTIPLICATION_FACTOR" value="1" />
|
|
<parameter name="MEM_ROW_ADDR_WIDTH" value="12" />
|
|
<parameter name="MEM_RTT_NOM" value="RZQ/6" />
|
|
<parameter name="MEM_RTT_WR" value="RZQ/4" />
|
|
<parameter name="MEM_SRT" value="Normal" />
|
|
<parameter name="MEM_TCL" value="11" />
|
|
<parameter name="MEM_TFAW_NS" value="30.0" />
|
|
<parameter name="MEM_TINIT_US" value="500" />
|
|
<parameter name="MEM_TMRD_CK" value="4" />
|
|
<parameter name="MEM_TRAS_NS" value="35.0" />
|
|
<parameter name="MEM_TRCD_NS" value="13.75" />
|
|
<parameter name="MEM_TREFI_US" value="7.8" />
|
|
<parameter name="MEM_TRFC_NS" value="110.0" />
|
|
<parameter name="MEM_TRP_NS" value="13.75" />
|
|
<parameter name="MEM_TRRD_NS" value="6.0" />
|
|
<parameter name="MEM_TRTP_NS" value="7.5" />
|
|
<parameter name="MEM_TWR_NS" value="15.0" />
|
|
<parameter name="MEM_TWTR" value="6" />
|
|
<parameter name="MEM_USER_LEVELING_MODE" value="Leveling" />
|
|
<parameter name="MEM_VENDOR" value="Micron" />
|
|
<parameter name="MEM_VERBOSE" value="true" />
|
|
<parameter name="MEM_VOLTAGE" value="1.5V DDR3" />
|
|
<parameter name="MEM_WTCL" value="8" />
|
|
<parameter name="MRS_MIRROR_PING_PONG_ATSO" value="false" />
|
|
<parameter name="MULTICAST_EN" value="false" />
|
|
<parameter name="NEXTGEN" value="true" />
|
|
<parameter name="NIOS_ROM_DATA_WIDTH" value="32" />
|
|
<parameter name="NUM_DLL_SHARING_INTERFACES" value="1" />
|
|
<parameter name="NUM_EXTRA_REPORT_PATH" value="10" />
|
|
<parameter name="NUM_OCT_SHARING_INTERFACES" value="1" />
|
|
<parameter name="NUM_OF_PORTS" value="1" />
|
|
<parameter name="NUM_PLL_SHARING_INTERFACES" value="1" />
|
|
<parameter name="OCT_SHARING_MODE" value="None" />
|
|
<parameter name="P2C_READ_CLOCK_ADD_PHASE" value="0.0" />
|
|
<parameter name="PACKAGE_DESKEW" value="false" />
|
|
<parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM" value="" />
|
|
<parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM_VALID" value="false" />
|
|
<parameter name="PHY_CSR_CONNECTION" value="INTERNAL_JTAG" />
|
|
<parameter name="PHY_CSR_ENABLED" value="false" />
|
|
<parameter name="PHY_ONLY" value="false" />
|
|
<parameter name="PINGPONGPHY_EN" value="false" />
|
|
<parameter name="PLL_ADDR_CMD_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_ADDR_CMD_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_ADDR_CMD_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_ADDR_CMD_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_AFI_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_AFI_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_AFI_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_AFI_HALF_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_HALF_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_AFI_HALF_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_AFI_HALF_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_HALF_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_HALF_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_AFI_PHY_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_PHY_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_AFI_PHY_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_AFI_PHY_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_PHY_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_AFI_PHY_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_C2P_WRITE_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_C2P_WRITE_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_C2P_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_C2P_WRITE_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_CLK_PARAM_VALID" value="false" />
|
|
<parameter name="PLL_CONFIG_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_CONFIG_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_CONFIG_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_CONFIG_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_CONFIG_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_CONFIG_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_DR_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_DR_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_DR_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_DR_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_DR_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_DR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_HR_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_HR_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_HR_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_HR_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_HR_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_HR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_LOCATION" value="Top_Bottom" />
|
|
<parameter name="PLL_MEM_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_MEM_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_MEM_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_MEM_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_MEM_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_MEM_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_NIOS_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_NIOS_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_NIOS_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_NIOS_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_NIOS_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_NIOS_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_P2C_READ_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_P2C_READ_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_P2C_READ_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_P2C_READ_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_P2C_READ_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_P2C_READ_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_SHARING_MODE" value="None" />
|
|
<parameter name="PLL_WRITE_CLK_DIV_PARAM" value="0" />
|
|
<parameter name="PLL_WRITE_CLK_FREQ_PARAM" value="0.0" />
|
|
<parameter name="PLL_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
|
|
<parameter name="PLL_WRITE_CLK_MULT_PARAM" value="0" />
|
|
<parameter name="PLL_WRITE_CLK_PHASE_PS_PARAM" value="0" />
|
|
<parameter name="PLL_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
|
|
<parameter name="POWER_OF_TWO_BUS" value="false" />
|
|
<parameter name="PRIORITY_PORT" value="1,1,1,1,1,1" />
|
|
<parameter name="RATE" value="Quarter" />
|
|
<parameter name="RDIMM_CONFIG" value="0" />
|
|
<parameter name="READ_DQ_DQS_CLOCK_SOURCE" value="INVERTED_DQS_BUS" />
|
|
<parameter name="READ_FIFO_SIZE" value="8" />
|
|
<parameter name="REFRESH_BURST_VALIDATION" value="false" />
|
|
<parameter name="REFRESH_INTERVAL" value="15000" />
|
|
<parameter name="REF_CLK_FREQ" value="100.0" />
|
|
<parameter name="REF_CLK_FREQ_MAX_PARAM" value="0.0" />
|
|
<parameter name="REF_CLK_FREQ_MIN_PARAM" value="0.0" />
|
|
<parameter name="REF_CLK_FREQ_PARAM_VALID" value="false" />
|
|
<parameter name="SEQUENCER_TYPE" value="NIOS" />
|
|
<parameter name="SEQ_MODE" value="0" />
|
|
<parameter name="SKIP_MEM_INIT" value="true" />
|
|
<parameter name="SOPC_COMPAT_RESET" value="false" />
|
|
<parameter name="SPEED_GRADE" value="3" />
|
|
<parameter name="STARVE_LIMIT" value="10" />
|
|
<parameter name="SYS_INFO_DEVICE_FAMILY" value="Arria V" />
|
|
<parameter name="TIMING_BOARD_AC_EYE_REDUCTION_H" value="0.0" />
|
|
<parameter name="TIMING_BOARD_AC_EYE_REDUCTION_SU" value="0.0" />
|
|
<parameter name="TIMING_BOARD_AC_SKEW" value="0.02" />
|
|
<parameter name="TIMING_BOARD_AC_SLEW_RATE" value="1.0" />
|
|
<parameter name="TIMING_BOARD_AC_TO_CK_SKEW" value="0.0" />
|
|
<parameter name="TIMING_BOARD_CK_CKN_SLEW_RATE" value="2.0" />
|
|
<parameter name="TIMING_BOARD_DELTA_DQS_ARRIVAL_TIME" value="0.0" />
|
|
<parameter name="TIMING_BOARD_DELTA_READ_DQS_ARRIVAL_TIME" value="0.0" />
|
|
<parameter name="TIMING_BOARD_DERATE_METHOD" value="AUTO" />
|
|
<parameter name="TIMING_BOARD_DQS_DQSN_SLEW_RATE" value="2.0" />
|
|
<parameter name="TIMING_BOARD_DQ_EYE_REDUCTION" value="0.0" />
|
|
<parameter name="TIMING_BOARD_DQ_SLEW_RATE" value="1.0" />
|
|
<parameter name="TIMING_BOARD_DQ_TO_DQS_SKEW" value="0.0" />
|
|
<parameter name="TIMING_BOARD_ISI_METHOD" value="AUTO" />
|
|
<parameter name="TIMING_BOARD_MAX_CK_DELAY" value="0.6" />
|
|
<parameter name="TIMING_BOARD_MAX_DQS_DELAY" value="0.6" />
|
|
<parameter name="TIMING_BOARD_READ_DQ_EYE_REDUCTION" value="0.0" />
|
|
<parameter name="TIMING_BOARD_SKEW_BETWEEN_DIMMS" value="0.05" />
|
|
<parameter name="TIMING_BOARD_SKEW_BETWEEN_DQS" value="0.02" />
|
|
<parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MAX" value="0.01" />
|
|
<parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MIN" value="-0.01" />
|
|
<parameter name="TIMING_BOARD_SKEW_WITHIN_DQS" value="0.02" />
|
|
<parameter name="TIMING_BOARD_TDH" value="0.0" />
|
|
<parameter name="TIMING_BOARD_TDS" value="0.0" />
|
|
<parameter name="TIMING_BOARD_TIH" value="0.0" />
|
|
<parameter name="TIMING_BOARD_TIS" value="0.0" />
|
|
<parameter name="TIMING_TDH" value="45" />
|
|
<parameter name="TIMING_TDQSCK" value="255" />
|
|
<parameter name="TIMING_TDQSCKDL" value="1200" />
|
|
<parameter name="TIMING_TDQSCKDM" value="900" />
|
|
<parameter name="TIMING_TDQSCKDS" value="450" />
|
|
<parameter name="TIMING_TDQSQ" value="100" />
|
|
<parameter name="TIMING_TDQSS" value="0.27" />
|
|
<parameter name="TIMING_TDS" value="10" />
|
|
<parameter name="TIMING_TDSH" value="0.18" />
|
|
<parameter name="TIMING_TDSS" value="0.18" />
|
|
<parameter name="TIMING_TIH" value="120" />
|
|
<parameter name="TIMING_TIS" value="170" />
|
|
<parameter name="TIMING_TQH" value="0.38" />
|
|
<parameter name="TIMING_TQSH" value="0.4" />
|
|
<parameter name="TRACKING_ERROR_TEST" value="false" />
|
|
<parameter name="TRACKING_WATCH_TEST" value="false" />
|
|
<parameter name="TREFI" value="35100" />
|
|
<parameter name="TRFC" value="350" />
|
|
<parameter name="USER_DEBUG_LEVEL" value="1" />
|
|
<parameter name="USE_AXI_ADAPTOR" value="false" />
|
|
<parameter name="USE_FAKE_PHY" value="false" />
|
|
<parameter name="USE_MEM_CLK_FREQ" value="false" />
|
|
<parameter name="USE_MM_ADAPTOR" value="true" />
|
|
<parameter name="USE_SEQUENCER_BFM" value="false" />
|
|
<parameter name="WEIGHT_PORT" value="0,0,0,0,0,0" />
|
|
<parameter name="WRBUFFER_ADDR_WIDTH" value="6" />
|
|
</module>
|
|
<module name="sys_ethernet" kind="altera_eth_tse" version="15.0" enabled="1">
|
|
<parameter name="AUTO_DEVICE" value="5AGTFD7K3F40I3" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
|
|
<parameter name="core_variation" value="MAC_ONLY" />
|
|
<parameter name="deviceFamilyName" value="Arria V" />
|
|
<parameter name="eg_addr" value="11" />
|
|
<parameter name="ena_hash" value="false" />
|
|
<parameter name="enable_alt_reconfig" value="false" />
|
|
<parameter name="enable_ecc" value="false" />
|
|
<parameter name="enable_ena" value="32" />
|
|
<parameter name="enable_gmii_loopback" value="false" />
|
|
<parameter name="enable_hd_logic" value="true" />
|
|
<parameter name="enable_mac_flow_ctrl" value="true" />
|
|
<parameter name="enable_mac_vlan" value="false" />
|
|
<parameter name="enable_magic_detect" value="true" />
|
|
<parameter name="enable_ptp_1step" value="false" />
|
|
<parameter name="enable_sgmii" value="false" />
|
|
<parameter name="enable_shift16" value="true" />
|
|
<parameter name="enable_sup_addr" value="false" />
|
|
<parameter name="enable_timestamping" value="false" />
|
|
<parameter name="enable_use_internal_fifo" value="true" />
|
|
<parameter name="export_pwrdn" value="false" />
|
|
<parameter name="ext_stat_cnt_ena" value="false" />
|
|
<parameter name="ifGMII" value="RGMII" />
|
|
<parameter name="ing_addr" value="11" />
|
|
<parameter name="max_channels" value="1" />
|
|
<parameter name="mdio_clk_div" value="30" />
|
|
<parameter name="nf_phyip_rcfg_enable" value="false" />
|
|
<parameter name="phy_identifier" value="0" />
|
|
<parameter name="phyip_en_synce_support" value="false" />
|
|
<parameter name="phyip_pll_base_data_rate" value="1250 Mbps" />
|
|
<parameter name="phyip_pll_type" value="CMU" />
|
|
<parameter name="phyip_pma_bonding_mode" value="x1" />
|
|
<parameter name="starting_channel_number" value="0" />
|
|
<parameter name="stat_cnt_ena" value="true" />
|
|
<parameter name="transceiver_type" value="NONE" />
|
|
<parameter name="tstamp_fp_width" value="4" />
|
|
<parameter name="useMDIO" value="true" />
|
|
<parameter name="use_mac_clken" value="false" />
|
|
<parameter name="use_misc_ports" value="true" />
|
|
</module>
|
|
<module
|
|
name="sys_ethernet_dma_rx"
|
|
kind="altera_msgdma"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="AUTO_DEVICE" value="5AGTFD7K3F40I3" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
|
|
<parameter name="AUTO_MM_READ_ADDRESS_MAP" value="" />
|
|
<parameter name="AUTO_MM_READ_ADDRESS_WIDTH" value="AddressWidth = -1" />
|
|
<parameter name="AUTO_MM_WRITE_ADDRESS_MAP"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.avl' start='0x0' end='0x10000000' /></address-map>]]></parameter>
|
|
<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH" value="AddressWidth = 28" />
|
|
<parameter name="BURST_ENABLE" value="1" />
|
|
<parameter name="BURST_WRAPPING_SUPPORT" value="0" />
|
|
<parameter name="CHANNEL_ENABLE" value="0" />
|
|
<parameter name="CHANNEL_WIDTH" value="8" />
|
|
<parameter name="DATA_FIFO_DEPTH" value="256" />
|
|
<parameter name="DATA_WIDTH" value="64" />
|
|
<parameter name="DESCRIPTOR_FIFO_DEPTH" value="512" />
|
|
<parameter name="ENHANCED_FEATURES" value="1" />
|
|
<parameter name="ERROR_ENABLE" value="1" />
|
|
<parameter name="ERROR_WIDTH" value="6" />
|
|
<parameter name="MAX_BURST_COUNT" value="64" />
|
|
<parameter name="MAX_BYTE" value="2048" />
|
|
<parameter name="MAX_STRIDE" value="1" />
|
|
<parameter name="MODE" value="2" />
|
|
<parameter name="PACKET_ENABLE" value="1" />
|
|
<parameter name="PROGRAMMABLE_BURST_ENABLE" value="0" />
|
|
<parameter name="RESPONSE_PORT" value="0" />
|
|
<parameter name="STRIDE_ENABLE" value="0" />
|
|
<parameter name="TRANSFER_TYPE" value="Unaligned Accesses" />
|
|
</module>
|
|
<module
|
|
name="sys_ethernet_dma_tx"
|
|
kind="altera_msgdma"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="AUTO_DEVICE" value="5AGTFD7K3F40I3" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
|
|
<parameter name="AUTO_MM_READ_ADDRESS_MAP"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.avl' start='0x0' end='0x10000000' /></address-map>]]></parameter>
|
|
<parameter name="AUTO_MM_READ_ADDRESS_WIDTH" value="AddressWidth = 28" />
|
|
<parameter name="AUTO_MM_WRITE_ADDRESS_MAP" value="" />
|
|
<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH" value="AddressWidth = -1" />
|
|
<parameter name="BURST_ENABLE" value="1" />
|
|
<parameter name="BURST_WRAPPING_SUPPORT" value="0" />
|
|
<parameter name="CHANNEL_ENABLE" value="0" />
|
|
<parameter name="CHANNEL_WIDTH" value="8" />
|
|
<parameter name="DATA_FIFO_DEPTH" value="256" />
|
|
<parameter name="DATA_WIDTH" value="64" />
|
|
<parameter name="DESCRIPTOR_FIFO_DEPTH" value="512" />
|
|
<parameter name="ENHANCED_FEATURES" value="1" />
|
|
<parameter name="ERROR_ENABLE" value="1" />
|
|
<parameter name="ERROR_WIDTH" value="1" />
|
|
<parameter name="MAX_BURST_COUNT" value="64" />
|
|
<parameter name="MAX_BYTE" value="2048" />
|
|
<parameter name="MAX_STRIDE" value="1" />
|
|
<parameter name="MODE" value="1" />
|
|
<parameter name="PACKET_ENABLE" value="1" />
|
|
<parameter name="PROGRAMMABLE_BURST_ENABLE" value="0" />
|
|
<parameter name="RESPONSE_PORT" value="2" />
|
|
<parameter name="STRIDE_ENABLE" value="0" />
|
|
<parameter name="TRANSFER_TYPE" value="Unaligned Accesses" />
|
|
</module>
|
|
<module name="sys_gpio" kind="altera_avalon_pio" version="15.0" enabled="1">
|
|
<parameter name="bitClearingEdgeCapReg" value="false" />
|
|
<parameter name="bitModifyingOutReg" value="false" />
|
|
<parameter name="captureEdge" value="false" />
|
|
<parameter name="clockRate" value="100000000" />
|
|
<parameter name="direction" value="InOut" />
|
|
<parameter name="edgeType" value="RISING" />
|
|
<parameter name="generateIRQ" value="true" />
|
|
<parameter name="irqType" value="LEVEL" />
|
|
<parameter name="resetValue" value="0" />
|
|
<parameter name="simDoTestBenchWiring" value="false" />
|
|
<parameter name="simDrivenValue" value="0" />
|
|
<parameter name="width" value="32" />
|
|
</module>
|
|
<module
|
|
name="sys_gpio_bd"
|
|
kind="altera_avalon_pio"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="bitClearingEdgeCapReg" value="false" />
|
|
<parameter name="bitModifyingOutReg" value="false" />
|
|
<parameter name="captureEdge" value="false" />
|
|
<parameter name="clockRate" value="100000000" />
|
|
<parameter name="direction" value="InOut" />
|
|
<parameter name="edgeType" value="RISING" />
|
|
<parameter name="generateIRQ" value="true" />
|
|
<parameter name="irqType" value="LEVEL" />
|
|
<parameter name="resetValue" value="0" />
|
|
<parameter name="simDoTestBenchWiring" value="false" />
|
|
<parameter name="simDrivenValue" value="0" />
|
|
<parameter name="width" value="32" />
|
|
</module>
|
|
<module
|
|
name="sys_id"
|
|
kind="altera_avalon_sysid_qsys"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
|
|
<parameter name="id" value="0" />
|
|
</module>
|
|
<module
|
|
name="sys_int_mem"
|
|
kind="altera_avalon_onchip_memory2"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="allowInSystemMemoryContentEditor" value="false" />
|
|
<parameter name="autoInitializationFileName">$${FILENAME}_sys_int_mem</parameter>
|
|
<parameter name="blockType" value="AUTO" />
|
|
<parameter name="copyInitFile" value="false" />
|
|
<parameter name="dataWidth" value="32" />
|
|
<parameter name="deviceFamily" value="Arria V" />
|
|
<parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
|
|
<parameter name="dualPort" value="false" />
|
|
<parameter name="ecc_enabled" value="false" />
|
|
<parameter name="initMemContent" value="true" />
|
|
<parameter name="initializationFileName" value="onchip_mem.hex" />
|
|
<parameter name="instanceID" value="NONE" />
|
|
<parameter name="memorySize" value="2097152" />
|
|
<parameter name="readDuringWriteMode" value="DONT_CARE" />
|
|
<parameter name="resetrequest_enabled" value="true" />
|
|
<parameter name="simAllowMRAMContentsFile" value="false" />
|
|
<parameter name="simMemInitOnlyFilename" value="0" />
|
|
<parameter name="singleClockOperation" value="false" />
|
|
<parameter name="slave1Latency" value="1" />
|
|
<parameter name="slave2Latency" value="1" />
|
|
<parameter name="useNonDefaultInitFile" value="false" />
|
|
<parameter name="useShallowMemBlocks" value="false" />
|
|
<parameter name="writable" value="true" />
|
|
</module>
|
|
<module name="sys_pll" kind="altera_pll" version="15.0" enabled="1">
|
|
<parameter name="debug_print_output" value="false" />
|
|
<parameter name="debug_use_rbc_taf_method" value="false" />
|
|
<parameter name="device" value="5AGTFD7K3F40I3" />
|
|
<parameter name="device_family" value="Arria V" />
|
|
<parameter name="gui_active_clk" value="false" />
|
|
<parameter name="gui_actual_output_clock_frequency0" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency1" value="166.666666 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency10" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency11" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency12" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency13" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency14" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency15" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency16" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency17" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency2" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency3" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency4" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency5" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency6" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency7" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency8" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency9" value="0 MHz" />
|
|
<parameter name="gui_actual_phase_shift0" value="0" />
|
|
<parameter name="gui_actual_phase_shift1" value="0" />
|
|
<parameter name="gui_actual_phase_shift10" value="0" />
|
|
<parameter name="gui_actual_phase_shift11" value="0" />
|
|
<parameter name="gui_actual_phase_shift12" value="0" />
|
|
<parameter name="gui_actual_phase_shift13" value="0" />
|
|
<parameter name="gui_actual_phase_shift14" value="0" />
|
|
<parameter name="gui_actual_phase_shift15" value="0" />
|
|
<parameter name="gui_actual_phase_shift16" value="0" />
|
|
<parameter name="gui_actual_phase_shift17" value="0" />
|
|
<parameter name="gui_actual_phase_shift2" value="0" />
|
|
<parameter name="gui_actual_phase_shift3" value="0" />
|
|
<parameter name="gui_actual_phase_shift4" value="0" />
|
|
<parameter name="gui_actual_phase_shift5" value="0" />
|
|
<parameter name="gui_actual_phase_shift6" value="0" />
|
|
<parameter name="gui_actual_phase_shift7" value="0" />
|
|
<parameter name="gui_actual_phase_shift8" value="0" />
|
|
<parameter name="gui_actual_phase_shift9" value="0" />
|
|
<parameter name="gui_cascade_counter0" value="false" />
|
|
<parameter name="gui_cascade_counter1" value="false" />
|
|
<parameter name="gui_cascade_counter10" value="false" />
|
|
<parameter name="gui_cascade_counter11" value="false" />
|
|
<parameter name="gui_cascade_counter12" value="false" />
|
|
<parameter name="gui_cascade_counter13" value="false" />
|
|
<parameter name="gui_cascade_counter14" value="false" />
|
|
<parameter name="gui_cascade_counter15" value="false" />
|
|
<parameter name="gui_cascade_counter16" value="false" />
|
|
<parameter name="gui_cascade_counter17" value="false" />
|
|
<parameter name="gui_cascade_counter2" value="false" />
|
|
<parameter name="gui_cascade_counter3" value="false" />
|
|
<parameter name="gui_cascade_counter4" value="false" />
|
|
<parameter name="gui_cascade_counter5" value="false" />
|
|
<parameter name="gui_cascade_counter6" value="false" />
|
|
<parameter name="gui_cascade_counter7" value="false" />
|
|
<parameter name="gui_cascade_counter8" value="false" />
|
|
<parameter name="gui_cascade_counter9" value="false" />
|
|
<parameter name="gui_cascade_outclk_index" value="0" />
|
|
<parameter name="gui_channel_spacing" value="0.0" />
|
|
<parameter name="gui_clk_bad" value="false" />
|
|
<parameter name="gui_device_speed_grade" value="2" />
|
|
<parameter name="gui_divide_factor_c0" value="1" />
|
|
<parameter name="gui_divide_factor_c1" value="1" />
|
|
<parameter name="gui_divide_factor_c10" value="1" />
|
|
<parameter name="gui_divide_factor_c11" value="1" />
|
|
<parameter name="gui_divide_factor_c12" value="1" />
|
|
<parameter name="gui_divide_factor_c13" value="1" />
|
|
<parameter name="gui_divide_factor_c14" value="1" />
|
|
<parameter name="gui_divide_factor_c15" value="1" />
|
|
<parameter name="gui_divide_factor_c16" value="1" />
|
|
<parameter name="gui_divide_factor_c17" value="1" />
|
|
<parameter name="gui_divide_factor_c2" value="1" />
|
|
<parameter name="gui_divide_factor_c3" value="1" />
|
|
<parameter name="gui_divide_factor_c4" value="1" />
|
|
<parameter name="gui_divide_factor_c5" value="1" />
|
|
<parameter name="gui_divide_factor_c6" value="1" />
|
|
<parameter name="gui_divide_factor_c7" value="1" />
|
|
<parameter name="gui_divide_factor_c8" value="1" />
|
|
<parameter name="gui_divide_factor_c9" value="1" />
|
|
<parameter name="gui_divide_factor_n" value="1" />
|
|
<parameter name="gui_dps_cntr" value="C0" />
|
|
<parameter name="gui_dps_dir" value="Positive" />
|
|
<parameter name="gui_dps_num" value="1" />
|
|
<parameter name="gui_dsm_out_sel" value="1st_order" />
|
|
<parameter name="gui_duty_cycle0" value="50" />
|
|
<parameter name="gui_duty_cycle1" value="50" />
|
|
<parameter name="gui_duty_cycle10" value="50" />
|
|
<parameter name="gui_duty_cycle11" value="50" />
|
|
<parameter name="gui_duty_cycle12" value="50" />
|
|
<parameter name="gui_duty_cycle13" value="50" />
|
|
<parameter name="gui_duty_cycle14" value="50" />
|
|
<parameter name="gui_duty_cycle15" value="50" />
|
|
<parameter name="gui_duty_cycle16" value="50" />
|
|
<parameter name="gui_duty_cycle17" value="50" />
|
|
<parameter name="gui_duty_cycle2" value="50" />
|
|
<parameter name="gui_duty_cycle3" value="50" />
|
|
<parameter name="gui_duty_cycle4" value="50" />
|
|
<parameter name="gui_duty_cycle5" value="50" />
|
|
<parameter name="gui_duty_cycle6" value="50" />
|
|
<parameter name="gui_duty_cycle7" value="50" />
|
|
<parameter name="gui_duty_cycle8" value="50" />
|
|
<parameter name="gui_duty_cycle9" value="50" />
|
|
<parameter name="gui_en_adv_params" value="false" />
|
|
<parameter name="gui_en_dps_ports" value="false" />
|
|
<parameter name="gui_en_phout_ports" value="false" />
|
|
<parameter name="gui_en_reconf" value="false" />
|
|
<parameter name="gui_enable_cascade_in" value="false" />
|
|
<parameter name="gui_enable_cascade_out" value="false" />
|
|
<parameter name="gui_enable_mif_dps" value="false" />
|
|
<parameter name="gui_feedback_clock" value="Global Clock" />
|
|
<parameter name="gui_frac_multiply_factor" value="1" />
|
|
<parameter name="gui_fractional_cout" value="32" />
|
|
<parameter name="gui_mif_generate" value="false" />
|
|
<parameter name="gui_multiply_factor" value="1" />
|
|
<parameter name="gui_number_of_clocks" value="3" />
|
|
<parameter name="gui_operation_mode" value="direct" />
|
|
<parameter name="gui_output_clock_frequency0" value="125.0" />
|
|
<parameter name="gui_output_clock_frequency1" value="25.0" />
|
|
<parameter name="gui_output_clock_frequency10" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency11" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency12" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency13" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency14" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency15" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency16" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency17" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency2" value="2.5" />
|
|
<parameter name="gui_output_clock_frequency3" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency4" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency5" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency6" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency7" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency8" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency9" value="100.0" />
|
|
<parameter name="gui_phase_shift0" value="0" />
|
|
<parameter name="gui_phase_shift1" value="0" />
|
|
<parameter name="gui_phase_shift10" value="0" />
|
|
<parameter name="gui_phase_shift11" value="0" />
|
|
<parameter name="gui_phase_shift12" value="0" />
|
|
<parameter name="gui_phase_shift13" value="0" />
|
|
<parameter name="gui_phase_shift14" value="0" />
|
|
<parameter name="gui_phase_shift15" value="0" />
|
|
<parameter name="gui_phase_shift16" value="0" />
|
|
<parameter name="gui_phase_shift17" value="0" />
|
|
<parameter name="gui_phase_shift2" value="0" />
|
|
<parameter name="gui_phase_shift3" value="0" />
|
|
<parameter name="gui_phase_shift4" value="0" />
|
|
<parameter name="gui_phase_shift5" value="0" />
|
|
<parameter name="gui_phase_shift6" value="0" />
|
|
<parameter name="gui_phase_shift7" value="0" />
|
|
<parameter name="gui_phase_shift8" value="0" />
|
|
<parameter name="gui_phase_shift9" value="0" />
|
|
<parameter name="gui_phase_shift_deg0" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg1" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg10" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg11" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg12" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg13" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg14" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg15" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg16" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg17" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg2" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg3" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg4" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg5" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg6" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg7" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg8" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg9" value="0.0" />
|
|
<parameter name="gui_phout_division" value="1" />
|
|
<parameter name="gui_pll_auto_reset" value="Off" />
|
|
<parameter name="gui_pll_bandwidth_preset" value="Auto" />
|
|
<parameter name="gui_pll_cascading_mode">Create an adjpllin signal to connect with an upstream PLL</parameter>
|
|
<parameter name="gui_pll_mode" value="Integer-N PLL" />
|
|
<parameter name="gui_ps_units0" value="ps" />
|
|
<parameter name="gui_ps_units1" value="ps" />
|
|
<parameter name="gui_ps_units10" value="ps" />
|
|
<parameter name="gui_ps_units11" value="ps" />
|
|
<parameter name="gui_ps_units12" value="ps" />
|
|
<parameter name="gui_ps_units13" value="ps" />
|
|
<parameter name="gui_ps_units14" value="ps" />
|
|
<parameter name="gui_ps_units15" value="ps" />
|
|
<parameter name="gui_ps_units16" value="ps" />
|
|
<parameter name="gui_ps_units17" value="ps" />
|
|
<parameter name="gui_ps_units2" value="ps" />
|
|
<parameter name="gui_ps_units3" value="ps" />
|
|
<parameter name="gui_ps_units4" value="ps" />
|
|
<parameter name="gui_ps_units5" value="ps" />
|
|
<parameter name="gui_ps_units6" value="ps" />
|
|
<parameter name="gui_ps_units7" value="ps" />
|
|
<parameter name="gui_ps_units8" value="ps" />
|
|
<parameter name="gui_ps_units9" value="ps" />
|
|
<parameter name="gui_refclk1_frequency" value="100.0" />
|
|
<parameter name="gui_refclk_switch" value="false" />
|
|
<parameter name="gui_reference_clock_frequency" value="100.0" />
|
|
<parameter name="gui_switchover_delay" value="0" />
|
|
<parameter name="gui_switchover_mode">Automatic Switchover</parameter>
|
|
<parameter name="gui_use_locked" value="true" />
|
|
</module>
|
|
<module name="sys_spi" kind="altera_avalon_spi" version="15.0" enabled="1">
|
|
<parameter name="avalonSpec" value="2.0" />
|
|
<parameter name="clockPhase" value="0" />
|
|
<parameter name="clockPolarity" value="0" />
|
|
<parameter name="dataWidth" value="8" />
|
|
<parameter name="disableAvalonFlowControl" value="false" />
|
|
<parameter name="inputClockRate" value="100000000" />
|
|
<parameter name="insertDelayBetweenSlaveSelectAndSClk" value="false" />
|
|
<parameter name="insertSync" value="false" />
|
|
<parameter name="lsbOrderedFirst" value="false" />
|
|
<parameter name="masterSPI" value="true" />
|
|
<parameter name="numberOfSlaves" value="1" />
|
|
<parameter name="syncRegDepth" value="2" />
|
|
<parameter name="targetClockRate" value="128000" />
|
|
<parameter name="targetSlaveSelectToSClkDelay" value="0.0" />
|
|
</module>
|
|
<module
|
|
name="sys_tcm_mem"
|
|
kind="altera_avalon_onchip_memory2"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="allowInSystemMemoryContentEditor" value="false" />
|
|
<parameter name="autoInitializationFileName">$${FILENAME}_sys_tcm_mem</parameter>
|
|
<parameter name="blockType" value="AUTO" />
|
|
<parameter name="copyInitFile" value="false" />
|
|
<parameter name="dataWidth" value="32" />
|
|
<parameter name="deviceFamily" value="Arria V" />
|
|
<parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
|
|
<parameter name="dualPort" value="false" />
|
|
<parameter name="ecc_enabled" value="false" />
|
|
<parameter name="initMemContent" value="true" />
|
|
<parameter name="initializationFileName" value="onchip_mem.hex" />
|
|
<parameter name="instanceID" value="NONE" />
|
|
<parameter name="memorySize" value="4096" />
|
|
<parameter name="readDuringWriteMode" value="DONT_CARE" />
|
|
<parameter name="resetrequest_enabled" value="true" />
|
|
<parameter name="simAllowMRAMContentsFile" value="false" />
|
|
<parameter name="simMemInitOnlyFilename" value="0" />
|
|
<parameter name="singleClockOperation" value="false" />
|
|
<parameter name="slave1Latency" value="1" />
|
|
<parameter name="slave2Latency" value="1" />
|
|
<parameter name="useNonDefaultInitFile" value="false" />
|
|
<parameter name="useShallowMemBlocks" value="false" />
|
|
<parameter name="writable" value="true" />
|
|
</module>
|
|
<module
|
|
name="sys_timer"
|
|
kind="altera_avalon_timer"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="alwaysRun" value="false" />
|
|
<parameter name="counterSize" value="32" />
|
|
<parameter name="fixedPeriod" value="false" />
|
|
<parameter name="period" value="1" />
|
|
<parameter name="periodUnits" value="MSEC" />
|
|
<parameter name="resetOutput" value="false" />
|
|
<parameter name="snapshot" value="true" />
|
|
<parameter name="systemFrequency" value="100000000" />
|
|
<parameter name="timeoutPulseOutput" value="false" />
|
|
<parameter name="watchdogPulse" value="2" />
|
|
</module>
|
|
<module
|
|
name="sys_uart"
|
|
kind="altera_avalon_jtag_uart"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="allowMultipleConnections" value="false" />
|
|
<parameter name="avalonSpec" value="2.0" />
|
|
<parameter name="clkFreq" value="100000000" />
|
|
<parameter name="hubInstanceID" value="0" />
|
|
<parameter name="readBufferDepth" value="64" />
|
|
<parameter name="readIRQThreshold" value="8" />
|
|
<parameter name="simInputCharacterStream" value="" />
|
|
<parameter name="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</parameter>
|
|
<parameter name="useRegistersForReadBuffer" value="false" />
|
|
<parameter name="useRegistersForWriteBuffer" value="false" />
|
|
<parameter name="useRelativePathForSimFile" value="false" />
|
|
<parameter name="writeBufferDepth" value="64" />
|
|
<parameter name="writeIRQThreshold" value="8" />
|
|
</module>
|
|
<module name="sys_xcvr" kind="altera_jesd204" version="15.0" enabled="1">
|
|
<parameter name="ADJCNT" value="0" />
|
|
<parameter name="ADJDIR" value="0" />
|
|
<parameter name="AUTO_DEVICE" value="5AGTFD7K3F40I3" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
|
|
<parameter name="BID" value="0" />
|
|
<parameter name="CF" value="0" />
|
|
<parameter name="CS" value="0" />
|
|
<parameter name="DATA_PATH" value="RX" />
|
|
<parameter name="DEVICE_FAMILY" value="Arria V" />
|
|
<parameter name="DID" value="0" />
|
|
<parameter name="DLB_TEST" value="0" />
|
|
<parameter name="ECC_EN" value="0" />
|
|
<parameter name="GUI_CFG_F" value="4" />
|
|
<parameter name="GUI_EN_CFG_F" value="false" />
|
|
<parameter name="HD" value="0" />
|
|
<parameter name="JESDV" value="1" />
|
|
<parameter name="K" value="32" />
|
|
<parameter name="L" value="4" />
|
|
<parameter name="LID0" value="0" />
|
|
<parameter name="LID1" value="1" />
|
|
<parameter name="LID2" value="2" />
|
|
<parameter name="LID3" value="3" />
|
|
<parameter name="LID4" value="4" />
|
|
<parameter name="LID5" value="5" />
|
|
<parameter name="LID6" value="6" />
|
|
<parameter name="LID7" value="7" />
|
|
<parameter name="M" value="4" />
|
|
<parameter name="N" value="16" />
|
|
<parameter name="N_PRIME" value="16" />
|
|
<parameter name="OPTIMIZE" value="0" />
|
|
<parameter name="PCS_CONFIG" value="JESD_PCS_CFG1" />
|
|
<parameter name="PHADJ" value="0" />
|
|
<parameter name="REFCLK_FREQ" value="250.0" />
|
|
<parameter name="RES1" value="0" />
|
|
<parameter name="RES2" value="0" />
|
|
<parameter name="S" value="1" />
|
|
<parameter name="SCR" value="1" />
|
|
<parameter name="SUBCLASSV" value="1" />
|
|
<parameter name="TERMINATE_RECONFIG_EN" value="false" />
|
|
<parameter name="TEST_COMPONENTS_EN" value="false" />
|
|
<parameter name="bitrev_en" value="false" />
|
|
<parameter name="bonded_mode" value="bonded" />
|
|
<parameter name="lane_rate" value="5000.0" />
|
|
<parameter name="part_trait_bd" value="ARRIAVB7" />
|
|
<parameter name="part_trait_dp" value="5AGTFD7K3F40I3" />
|
|
<parameter name="pll_reconfig_enable" value="false" />
|
|
<parameter name="pll_type" value="CMU" />
|
|
<parameter name="rcfg_jtag_enable" value="false" />
|
|
<parameter name="sdc_constraint" value="1.0" />
|
|
<parameter name="set_capability_reg_enable" value="false" />
|
|
<parameter name="set_csr_soft_logic_enable" value="false" />
|
|
<parameter name="set_prbs_soft_logic_enable" value="false" />
|
|
<parameter name="set_user_identifier" value="0" />
|
|
<parameter name="wrapper_opt" value="base_phy" />
|
|
</module>
|
|
<module
|
|
name="sys_xcvr_rstcntrl"
|
|
kind="altera_xcvr_reset_control"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="CHANNELS" value="4" />
|
|
<parameter name="PLLS" value="1" />
|
|
<parameter name="REDUCED_SIM_TIME" value="1" />
|
|
<parameter name="RX_ENABLE" value="1" />
|
|
<parameter name="RX_PER_CHANNEL" value="0" />
|
|
<parameter name="SYNCHRONIZE_PLL_RESET" value="0" />
|
|
<parameter name="SYNCHRONIZE_RESET" value="1" />
|
|
<parameter name="SYS_CLK_IN_MHZ" value="50" />
|
|
<parameter name="TX_ENABLE" value="0" />
|
|
<parameter name="TX_PER_CHANNEL" value="0" />
|
|
<parameter name="TX_PLL_ENABLE" value="0" />
|
|
<parameter name="T_PLL_LOCK_HYST" value="0" />
|
|
<parameter name="T_PLL_POWERDOWN" value="1000" />
|
|
<parameter name="T_RX_ANALOGRESET" value="40" />
|
|
<parameter name="T_RX_DIGITALRESET" value="4000" />
|
|
<parameter name="T_TX_DIGITALRESET" value="20" />
|
|
<parameter name="device_family" value="Arria V" />
|
|
<parameter name="gui_pll_cal_busy" value="0" />
|
|
<parameter name="gui_rx_auto_reset" value="0" />
|
|
<parameter name="gui_split_interfaces" value="0" />
|
|
<parameter name="gui_tx_auto_reset" value="1" />
|
|
</module>
|
|
<module name="sys_xcvr_rx_clk" kind="altera_pll" version="15.0" enabled="1">
|
|
<parameter name="debug_print_output" value="false" />
|
|
<parameter name="debug_use_rbc_taf_method" value="false" />
|
|
<parameter name="device" value="5AGTFD7K3F40I3" />
|
|
<parameter name="device_family" value="Arria V" />
|
|
<parameter name="gui_active_clk" value="false" />
|
|
<parameter name="gui_actual_output_clock_frequency0" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency1" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency10" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency11" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency12" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency13" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency14" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency15" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency16" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency17" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency2" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency3" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency4" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency5" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency6" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency7" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency8" value="0 MHz" />
|
|
<parameter name="gui_actual_output_clock_frequency9" value="0 MHz" />
|
|
<parameter name="gui_actual_phase_shift0" value="0" />
|
|
<parameter name="gui_actual_phase_shift1" value="0" />
|
|
<parameter name="gui_actual_phase_shift10" value="0" />
|
|
<parameter name="gui_actual_phase_shift11" value="0" />
|
|
<parameter name="gui_actual_phase_shift12" value="0" />
|
|
<parameter name="gui_actual_phase_shift13" value="0" />
|
|
<parameter name="gui_actual_phase_shift14" value="0" />
|
|
<parameter name="gui_actual_phase_shift15" value="0" />
|
|
<parameter name="gui_actual_phase_shift16" value="0" />
|
|
<parameter name="gui_actual_phase_shift17" value="0" />
|
|
<parameter name="gui_actual_phase_shift2" value="0" />
|
|
<parameter name="gui_actual_phase_shift3" value="0" />
|
|
<parameter name="gui_actual_phase_shift4" value="0" />
|
|
<parameter name="gui_actual_phase_shift5" value="0" />
|
|
<parameter name="gui_actual_phase_shift6" value="0" />
|
|
<parameter name="gui_actual_phase_shift7" value="0" />
|
|
<parameter name="gui_actual_phase_shift8" value="0" />
|
|
<parameter name="gui_actual_phase_shift9" value="0" />
|
|
<parameter name="gui_cascade_counter0" value="false" />
|
|
<parameter name="gui_cascade_counter1" value="false" />
|
|
<parameter name="gui_cascade_counter10" value="false" />
|
|
<parameter name="gui_cascade_counter11" value="false" />
|
|
<parameter name="gui_cascade_counter12" value="false" />
|
|
<parameter name="gui_cascade_counter13" value="false" />
|
|
<parameter name="gui_cascade_counter14" value="false" />
|
|
<parameter name="gui_cascade_counter15" value="false" />
|
|
<parameter name="gui_cascade_counter16" value="false" />
|
|
<parameter name="gui_cascade_counter17" value="false" />
|
|
<parameter name="gui_cascade_counter2" value="false" />
|
|
<parameter name="gui_cascade_counter3" value="false" />
|
|
<parameter name="gui_cascade_counter4" value="false" />
|
|
<parameter name="gui_cascade_counter5" value="false" />
|
|
<parameter name="gui_cascade_counter6" value="false" />
|
|
<parameter name="gui_cascade_counter7" value="false" />
|
|
<parameter name="gui_cascade_counter8" value="false" />
|
|
<parameter name="gui_cascade_counter9" value="false" />
|
|
<parameter name="gui_cascade_outclk_index" value="0" />
|
|
<parameter name="gui_channel_spacing" value="0.0" />
|
|
<parameter name="gui_clk_bad" value="false" />
|
|
<parameter name="gui_device_speed_grade" value="2" />
|
|
<parameter name="gui_divide_factor_c0" value="1" />
|
|
<parameter name="gui_divide_factor_c1" value="1" />
|
|
<parameter name="gui_divide_factor_c10" value="1" />
|
|
<parameter name="gui_divide_factor_c11" value="1" />
|
|
<parameter name="gui_divide_factor_c12" value="1" />
|
|
<parameter name="gui_divide_factor_c13" value="1" />
|
|
<parameter name="gui_divide_factor_c14" value="1" />
|
|
<parameter name="gui_divide_factor_c15" value="1" />
|
|
<parameter name="gui_divide_factor_c16" value="1" />
|
|
<parameter name="gui_divide_factor_c17" value="1" />
|
|
<parameter name="gui_divide_factor_c2" value="1" />
|
|
<parameter name="gui_divide_factor_c3" value="1" />
|
|
<parameter name="gui_divide_factor_c4" value="1" />
|
|
<parameter name="gui_divide_factor_c5" value="1" />
|
|
<parameter name="gui_divide_factor_c6" value="1" />
|
|
<parameter name="gui_divide_factor_c7" value="1" />
|
|
<parameter name="gui_divide_factor_c8" value="1" />
|
|
<parameter name="gui_divide_factor_c9" value="1" />
|
|
<parameter name="gui_divide_factor_n" value="1" />
|
|
<parameter name="gui_dps_cntr" value="C0" />
|
|
<parameter name="gui_dps_dir" value="Positive" />
|
|
<parameter name="gui_dps_num" value="1" />
|
|
<parameter name="gui_dsm_out_sel" value="1st_order" />
|
|
<parameter name="gui_duty_cycle0" value="50" />
|
|
<parameter name="gui_duty_cycle1" value="50" />
|
|
<parameter name="gui_duty_cycle10" value="50" />
|
|
<parameter name="gui_duty_cycle11" value="50" />
|
|
<parameter name="gui_duty_cycle12" value="50" />
|
|
<parameter name="gui_duty_cycle13" value="50" />
|
|
<parameter name="gui_duty_cycle14" value="50" />
|
|
<parameter name="gui_duty_cycle15" value="50" />
|
|
<parameter name="gui_duty_cycle16" value="50" />
|
|
<parameter name="gui_duty_cycle17" value="50" />
|
|
<parameter name="gui_duty_cycle2" value="50" />
|
|
<parameter name="gui_duty_cycle3" value="50" />
|
|
<parameter name="gui_duty_cycle4" value="50" />
|
|
<parameter name="gui_duty_cycle5" value="50" />
|
|
<parameter name="gui_duty_cycle6" value="50" />
|
|
<parameter name="gui_duty_cycle7" value="50" />
|
|
<parameter name="gui_duty_cycle8" value="50" />
|
|
<parameter name="gui_duty_cycle9" value="50" />
|
|
<parameter name="gui_en_adv_params" value="false" />
|
|
<parameter name="gui_en_dps_ports" value="false" />
|
|
<parameter name="gui_en_phout_ports" value="false" />
|
|
<parameter name="gui_en_reconf" value="false" />
|
|
<parameter name="gui_enable_cascade_in" value="false" />
|
|
<parameter name="gui_enable_cascade_out" value="false" />
|
|
<parameter name="gui_enable_mif_dps" value="false" />
|
|
<parameter name="gui_feedback_clock" value="Global Clock" />
|
|
<parameter name="gui_frac_multiply_factor" value="1" />
|
|
<parameter name="gui_fractional_cout" value="32" />
|
|
<parameter name="gui_mif_generate" value="false" />
|
|
<parameter name="gui_multiply_factor" value="1" />
|
|
<parameter name="gui_number_of_clocks" value="1" />
|
|
<parameter name="gui_operation_mode" value="direct" />
|
|
<parameter name="gui_output_clock_frequency0" value="125.0" />
|
|
<parameter name="gui_output_clock_frequency1" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency10" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency11" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency12" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency13" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency14" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency15" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency16" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency17" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency2" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency3" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency4" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency5" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency6" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency7" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency8" value="100.0" />
|
|
<parameter name="gui_output_clock_frequency9" value="100.0" />
|
|
<parameter name="gui_phase_shift0" value="0" />
|
|
<parameter name="gui_phase_shift1" value="0" />
|
|
<parameter name="gui_phase_shift10" value="0" />
|
|
<parameter name="gui_phase_shift11" value="0" />
|
|
<parameter name="gui_phase_shift12" value="0" />
|
|
<parameter name="gui_phase_shift13" value="0" />
|
|
<parameter name="gui_phase_shift14" value="0" />
|
|
<parameter name="gui_phase_shift15" value="0" />
|
|
<parameter name="gui_phase_shift16" value="0" />
|
|
<parameter name="gui_phase_shift17" value="0" />
|
|
<parameter name="gui_phase_shift2" value="0" />
|
|
<parameter name="gui_phase_shift3" value="0" />
|
|
<parameter name="gui_phase_shift4" value="0" />
|
|
<parameter name="gui_phase_shift5" value="0" />
|
|
<parameter name="gui_phase_shift6" value="0" />
|
|
<parameter name="gui_phase_shift7" value="0" />
|
|
<parameter name="gui_phase_shift8" value="0" />
|
|
<parameter name="gui_phase_shift9" value="0" />
|
|
<parameter name="gui_phase_shift_deg0" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg1" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg10" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg11" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg12" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg13" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg14" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg15" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg16" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg17" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg2" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg3" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg4" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg5" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg6" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg7" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg8" value="0.0" />
|
|
<parameter name="gui_phase_shift_deg9" value="0.0" />
|
|
<parameter name="gui_phout_division" value="1" />
|
|
<parameter name="gui_pll_auto_reset" value="Off" />
|
|
<parameter name="gui_pll_bandwidth_preset" value="Auto" />
|
|
<parameter name="gui_pll_cascading_mode">Create an adjpllin signal to connect with an upstream PLL</parameter>
|
|
<parameter name="gui_pll_mode" value="Integer-N PLL" />
|
|
<parameter name="gui_ps_units0" value="ps" />
|
|
<parameter name="gui_ps_units1" value="ps" />
|
|
<parameter name="gui_ps_units10" value="ps" />
|
|
<parameter name="gui_ps_units11" value="ps" />
|
|
<parameter name="gui_ps_units12" value="ps" />
|
|
<parameter name="gui_ps_units13" value="ps" />
|
|
<parameter name="gui_ps_units14" value="ps" />
|
|
<parameter name="gui_ps_units15" value="ps" />
|
|
<parameter name="gui_ps_units16" value="ps" />
|
|
<parameter name="gui_ps_units17" value="ps" />
|
|
<parameter name="gui_ps_units2" value="ps" />
|
|
<parameter name="gui_ps_units3" value="ps" />
|
|
<parameter name="gui_ps_units4" value="ps" />
|
|
<parameter name="gui_ps_units5" value="ps" />
|
|
<parameter name="gui_ps_units6" value="ps" />
|
|
<parameter name="gui_ps_units7" value="ps" />
|
|
<parameter name="gui_ps_units8" value="ps" />
|
|
<parameter name="gui_ps_units9" value="ps" />
|
|
<parameter name="gui_refclk1_frequency" value="100.0" />
|
|
<parameter name="gui_refclk_switch" value="false" />
|
|
<parameter name="gui_reference_clock_frequency" value="250.0" />
|
|
<parameter name="gui_switchover_delay" value="0" />
|
|
<parameter name="gui_switchover_mode">Automatic Switchover</parameter>
|
|
<parameter name="gui_use_locked" value="true" />
|
|
</module>
|
|
<module
|
|
name="sys_xcvr_rx_ref_clk"
|
|
kind="clock_source"
|
|
version="15.0"
|
|
enabled="1">
|
|
<parameter name="clockFrequency" value="2500000000" />
|
|
<parameter name="clockFrequencyKnown" value="true" />
|
|
<parameter name="inputClockFrequency" value="0" />
|
|
<parameter name="resetSynchronousEdges" value="NONE" />
|
|
</module>
|
|
<module name="util_bsplit" kind="util_bsplit" version="1.0" enabled="1">
|
|
<parameter name="CH_CNT" value="2" />
|
|
<parameter name="CH_DW" value="64" />
|
|
</module>
|
|
<module name="util_cpack_0" kind="util_cpack" version="1.0" enabled="1">
|
|
<parameter name="CH_CNT" value="2" />
|
|
<parameter name="CH_DW" value="32" />
|
|
</module>
|
|
<module name="util_cpack_1" kind="util_cpack" version="1.0" enabled="1">
|
|
<parameter name="CH_CNT" value="2" />
|
|
<parameter name="CH_DW" value="32" />
|
|
</module>
|
|
<module
|
|
name="util_jesd_align_0"
|
|
kind="util_jesd_align"
|
|
version="1.0"
|
|
enabled="1">
|
|
<parameter name="NUM_OF_LANES" value="2" />
|
|
</module>
|
|
<module
|
|
name="util_jesd_align_1"
|
|
kind="util_jesd_align"
|
|
version="1.0"
|
|
enabled="1">
|
|
<parameter name="NUM_OF_LANES" value="2" />
|
|
</module>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_uart.avalon_jtag_slave">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b4f0" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_ddr3_cntrl.avl">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x0000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_ethernet.control_port">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_id.control_slave">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b4e8" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_ethernet_dma_tx.csr">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b4a0" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_ethernet_dma_rx.csr">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b480" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_cpu.debug_mem_slave">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043a800" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_ethernet_dma_rx.descriptor_slave">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b460" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_ethernet_dma_tx.descriptor_slave">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b440" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_ethernet_dma_rx.response">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b4e0" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_int_mem.s1">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10200000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_gpio.s1">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b4d0" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_timer.s1">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b420" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="sys_gpio_bd.s1">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b4c0" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="axi_ad9250_1.s_axi">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10420000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="axi_dmac_0.s_axi">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10434000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="axi_ad9250_0.s_axi">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10410000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="axi_dmac_1.s_axi">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10430000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="15.0"
|
|
start="sys_cpu.data_master"
|
|
end="axi_jesd_xcvr.s_axi">
|
|
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|
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<parameter name="baseAddress" value="0x10400000" />
|
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|
|
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|
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|
|
kind="avalon"
|
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|
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|
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|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x1043b400" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
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|
|
kind="avalon"
|
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|
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start="sys_cpu.instruction_master"
|
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|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x0000" />
|
|
<parameter name="defaultConnection" value="false" />
|
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|
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|
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|
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|
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|
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|
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|
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|
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<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10200000" />
|
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<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
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|
|
kind="avalon"
|
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|
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|
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|
|
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|
|
<parameter name="baseAddress" value="0x0000" />
|
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|
|
</connection>
|
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|
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kind="avalon"
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|
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|
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|
|
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|
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|
|
</connection>
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|
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kind="avalon"
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|
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|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x0000" />
|
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|
|
</connection>
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|
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kind="avalon"
|
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|
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|
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|
|
<parameter name="arbitrationPriority" value="1" />
|
|
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|
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<parameter name="defaultConnection" value="false" />
|
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</connection>
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|
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<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10439000" />
|
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<parameter name="defaultConnection" value="false" />
|
|
</connection>
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|
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|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x10439000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
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|
|
kind="avalon_streaming"
|
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version="15.0"
|
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|
|
end="axi_ad9250_0.if_rx_data" />
|
|
<connection
|
|
kind="avalon_streaming"
|
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version="15.0"
|
|
start="util_jesd_align_1.if_rx_data"
|
|
end="axi_ad9250_1.if_rx_data" />
|
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|
|
kind="avalon_streaming"
|
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version="15.0"
|
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|
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|
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|
|
kind="avalon_streaming"
|
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version="15.0"
|
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|
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|
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<connection
|
|
kind="avalon_streaming"
|
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version="15.0"
|
|
start="sys_xcvr.jesd204_rx_link"
|
|
end="util_bsplit.if_data" />
|
|
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|
|
kind="avalon_streaming"
|
|
version="15.0"
|
|
start="sys_ethernet.receive"
|
|
end="sys_ethernet_dma_rx.st_sink" />
|
|
<connection
|
|
kind="avalon_streaming"
|
|
version="15.0"
|
|
start="sys_ethernet_dma_tx.st_source"
|
|
end="sys_ethernet.transmit" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_ddr3_cntrl.afi_clk"
|
|
end="axi_dmac_1.m_dest_axi_clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_ddr3_cntrl.afi_clk"
|
|
end="axi_dmac_0.m_dest_axi_clock" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_cpu.clk" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_uart.clk" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_timer.clk" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_id.clk" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_gpio_bd.clk" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_gpio.clk" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_spi.clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_int_mem.clk1" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_tcm_mem.clk1" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_ethernet_dma_rx.clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_ethernet_dma_tx.clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_xcvr_rstcntrl.clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_ethernet.control_port_clock_connection" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_xcvr.jesd204_rx_avs_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_ddr3_cntrl.pll_ref_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_ref_clk.clk"
|
|
end="sys_xcvr.pll_ref_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_ethernet.receive_clock_connection" />
|
|
<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_pll.refclk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_ref_clk.clk"
|
|
end="sys_xcvr_rx_clk.refclk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="axi_dmac_1.s_axi_clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="axi_ad9250_1.s_axi_clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="axi_dmac_0.s_axi_clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="axi_ad9250_0.s_axi_clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="axi_jesd_xcvr.s_axi_clock" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_clk.clk"
|
|
end="sys_ethernet.transmit_clock_connection" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="util_cpack_0.if_adc_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="util_cpack_1.if_adc_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="util_bsplit.if_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="axi_dmac_0.if_fifo_wr_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="axi_dmac_1.if_fifo_wr_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="axi_ad9250_0.if_rx_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="util_jesd_align_0.if_rx_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="util_jesd_align_1.if_rx_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="axi_ad9250_1.if_rx_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="axi_jesd_xcvr.if_rx_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="axi_jesd_xcvr.if_tx_clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="15.0"
|
|
start="sys_xcvr_rx_clk.outclk0"
|
|
end="sys_xcvr.rxlink_clk" />
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="sys_xcvr.alldev_lane_aligned"
|
|
end="sys_xcvr.dev_lane_aligned">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="sys_xcvr.dev_sync_n"
|
|
end="axi_jesd_xcvr.if_rx_ip_sync">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
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|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_cpack_0.if_adc_data"
|
|
end="axi_dmac_0.if_fifo_wr_din">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
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|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_cpack_1.if_adc_data"
|
|
end="axi_dmac_1.if_fifo_wr_din">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
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|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_0.if_adc_data_a"
|
|
end="util_cpack_0.if_adc_data_0">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
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|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_1.if_adc_data_a"
|
|
end="util_cpack_1.if_adc_data_0">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_0.if_adc_data_b"
|
|
end="util_cpack_0.if_adc_data_1">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_1.if_adc_data_b"
|
|
end="util_cpack_1.if_adc_data_1">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_cpack_1.if_adc_enable_0"
|
|
end="axi_ad9250_1.if_adc_enable_a">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_0.if_adc_enable_a"
|
|
end="util_cpack_0.if_adc_enable_0">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_0.if_adc_enable_b"
|
|
end="util_cpack_0.if_adc_enable_1">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_1.if_adc_enable_b"
|
|
end="util_cpack_1.if_adc_enable_1">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_cpack_0.if_adc_sync"
|
|
end="axi_dmac_0.if_fifo_wr_sync">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_cpack_1.if_adc_sync"
|
|
end="axi_dmac_1.if_fifo_wr_sync">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_cpack_0.if_adc_valid_0"
|
|
end="axi_ad9250_0.if_adc_valid_a">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_cpack_1.if_adc_valid_1"
|
|
end="axi_ad9250_1.if_adc_valid_b">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_1.if_adc_valid_a"
|
|
end="util_cpack_1.if_adc_valid_0">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_ad9250_0.if_adc_valid_b"
|
|
end="util_cpack_0.if_adc_valid_1">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_dmac_0.if_fifo_wr_en"
|
|
end="util_cpack_0.if_adc_valid">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_dmac_1.if_fifo_wr_en"
|
|
end="util_cpack_1.if_adc_valid">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_dmac_0.if_fifo_wr_overflow"
|
|
end="axi_ad9250_0.if_adc_dovf">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_dmac_1.if_fifo_wr_overflow"
|
|
end="axi_ad9250_1.if_adc_dovf">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_jesd_align_1.if_rx_ip_sof"
|
|
end="sys_xcvr.sof">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="util_jesd_align_1.if_rx_ip_sof_out"
|
|
end="util_jesd_align_0.if_rx_ip_sof">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="axi_jesd_xcvr.if_rx_status"
|
|
end="sys_xcvr_rstcntrl.rx_ready">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="sys_xcvr_rstcntrl.rx_analogreset"
|
|
end="sys_xcvr.rx_analogreset">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="sys_xcvr_rstcntrl.rx_cal_busy"
|
|
end="sys_xcvr.rx_cal_busy">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="sys_xcvr.rx_digitalreset"
|
|
end="sys_xcvr_rstcntrl.rx_digitalreset">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="15.0"
|
|
start="sys_xcvr_rstcntrl.rx_is_lockedtodata"
|
|
end="sys_xcvr.rx_islockedtodata">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="sys_ethernet_dma_rx.csr_irq">
|
|
<parameter name="irqNumber" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="sys_ethernet_dma_tx.csr_irq">
|
|
<parameter name="irqNumber" value="1" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="axi_dmac_0.interrupt_sender">
|
|
<parameter name="irqNumber" value="2" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="axi_dmac_1.interrupt_sender">
|
|
<parameter name="irqNumber" value="3" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="sys_uart.irq">
|
|
<parameter name="irqNumber" value="4" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="sys_timer.irq">
|
|
<parameter name="irqNumber" value="5" />
|
|
</connection>
|
|
<connection kind="interrupt" version="15.0" start="sys_cpu.irq" end="sys_spi.irq">
|
|
<parameter name="irqNumber" value="6" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="sys_gpio.irq">
|
|
<parameter name="irqNumber" value="7" />
|
|
</connection>
|
|
<connection
|
|
kind="interrupt"
|
|
version="15.0"
|
|
start="sys_cpu.irq"
|
|
end="sys_gpio_bd.irq">
|
|
<parameter name="irqNumber" value="8" />
|
|
</connection>
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_ddr3_cntrl.afi_reset"
|
|
end="axi_dmac_1.m_dest_axi_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_ddr3_cntrl.afi_reset"
|
|
end="axi_dmac_0.m_dest_axi_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_ddr3_cntrl.global_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_xcvr.jesd204_rx_avs_rst_n" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_pll.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_cpu.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_uart.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_timer.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_id.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_gpio.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_spi.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_gpio_bd.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_xcvr_rstcntrl.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_int_mem.reset1" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_tcm_mem.reset1" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_ethernet.reset_connection" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_ethernet_dma_rx.reset_n" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_ethernet_dma_tx.reset_n" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="axi_ad9250_0.s_axi_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="axi_dmac_0.s_axi_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="axi_ad9250_1.s_axi_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="axi_dmac_1.s_axi_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="axi_jesd_xcvr.s_axi_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="sys_clk.clk_reset"
|
|
end="sys_ddr3_cntrl.soft_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="axi_jesd_xcvr.if_rst"
|
|
end="sys_xcvr_rx_ref_clk.clk_in_reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="axi_jesd_xcvr.if_rst"
|
|
end="sys_xcvr_rx_clk.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="axi_jesd_xcvr.if_rst"
|
|
end="sys_xcvr_rstcntrl.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="15.0"
|
|
start="axi_jesd_xcvr.if_rx_rst"
|
|
end="sys_xcvr.rxlink_rst_n" />
|
|
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="FIFO" />
|
|
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
|
|
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="2" />
|
|
</system>
|