31 lines
828 B
Tcl
31 lines
828 B
Tcl
# ip
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
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global VIVADO_IP_LIBRARY
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adi_ip_create axi_ad9250
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adi_ip_files axi_ad9250 [list \
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"axi_ad9250.v" ]
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adi_ip_properties axi_ad9250
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adi_init_bd_tcl
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adi_ip_bd axi_ad9250 "bd/bd.tcl"
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adi_ip_add_core_dependencies [list \
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analog.com:$VIVADO_IP_LIBRARY:ad_ip_jesd204_tpl_adc:1.0 \
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]
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set_property driver_value 0 [ipx::get_ports *rx_valid* -of_objects [ipx::current_core]]
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set_property driver_value 0 [ipx::get_ports *dovf* -of_objects [ipx::current_core]]
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ipx::infer_bus_interface rx_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface adc_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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adi_add_auto_fpga_spec_params
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ipx::create_xgui_files [ipx::current_core]
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ipx::save_core [ipx::current_core]
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