Laszlo Nagy 83d3bded63 axi_ad9361:xilinx:axi_ad9361_lvds_if: fix Rx latency ... This commit reverts part of the changes done in the following commit: - ff50963c7f - "axi_ad9361- altera/xilinx reconcile- may be broken- do not use" The above mentioned commit introduced latency variations on the Rx path at different sample rates, or within the same sample rate after sample rate changes. The variation is caused by multiple positions of the frame detection combined with a free running toggle (rx_valid) that is not synchronized with the actual samples. Having a single frame detection position eliminates the latency variation.		2019-09-27 17:52:10 +03:00
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axi_ad9361_cmos_if.v	axi_ad9361: make the use of Rx SSI clock optional	2019-09-27 17:52:10 +03:00
axi_ad9361_lvds_if.v	axi_ad9361:xilinx:axi_ad9361_lvds_if: fix Rx latency	2019-09-27 17:52:10 +03:00