Laszlo Nagy 002f8d8a3e jesd204/ad_ip_jesd204_tpl_adc: add support for more lanes and converters		2019-11-28 16:17:21 +02:00
..
Makefile	Makefile: Update makefiles	2019-08-26 16:58:01 +03:00
ad_ip_jesd204_tpl_adc.v	Add FPGA info parameters flow	2019-03-30 11:26:11 +02:00
ad_ip_jesd204_tpl_adc_channel.v	ad_ip_jesd204_tpl_adc: Add 8 bit resolution support	2019-03-20 15:51:28 +02:00
ad_ip_jesd204_tpl_adc_core.v	ad_ip_jesd204_tpl_adc: Add 8 bit resolution support	2019-03-20 15:51:28 +02:00
ad_ip_jesd204_tpl_adc_deframer.v	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_hw.tcl	ad_ip_jesd204_tpl_adc: BITS_PER_SAMPLE is a HDL parameter	2019-10-02 15:32:17 +03:00
ad_ip_jesd204_tpl_adc_ip.tcl	jesd204/ad_ip_jesd204_tpl_adc: add support for more lanes and converters	2019-11-28 16:17:21 +02:00
ad_ip_jesd204_tpl_adc_pnmon.v	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_regmap.v	jesd204/ad_ip_jesd204_tpl_adc: add support for more lanes and converters	2019-11-28 16:17:21 +02:00