Istvan Csomortani 5329458a62 library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl		2019-06-29 06:53:51 +03:00
..
Makefile	all: Rename altera to intel	2019-06-29 06:53:51 +03:00
axi_ad9250.v	Add FPGA info parameters flow	2019-03-30 11:26:11 +02:00
axi_ad9250_hw.tcl	library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl	2019-06-29 06:53:51 +03:00
axi_ad9250_ip.tcl	library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl	2019-06-29 06:53:51 +03:00