Istvan Csomortani 5329458a62 library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl		2019-06-29 06:53:51 +03:00
..
Makefile	all: Rename altera to intel	2019-06-29 06:53:51 +03:00
axi_ad9671.v	Add FPGA info parameters flow	2019-03-30 11:26:11 +02:00
axi_ad9671_channel.v	license: Fix a spelling mistake	2018-04-11 15:09:54 +03:00
axi_ad9671_hw.tcl	library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl	2019-06-29 06:53:51 +03:00
axi_ad9671_if.v	whitespace: Delete all trailing white spaces	2019-06-07 10:20:15 +03:00
axi_ad9671_ip.tcl	library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl	2019-06-29 06:53:51 +03:00
axi_ad9671_pnmon.v	license: Fix a spelling mistake	2018-04-11 15:09:54 +03:00