zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
pluto_hdl_adi/projects/adrv9364z7020
History
rejeesh kutty 77275713e9 Update README.md 2017-08-08 14:09:37 -04:00
..
ccbob_cmos ad9361- clkdiv to util_ad9361_divclk 2017-08-07 11:25:55 -04:00
ccbob_lvds adrv9364- ps_intr_11 used for pps 2017-07-31 09:48:33 -04:00
ccbox_lvds adrv9364z7020: Connect the gps_pps signal to the receiver 2017-07-28 08:08:27 +01:00
ccusb_lvds scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
common adrv936x- bd.tcl in data flow format 2017-08-04 13:48:22 -04:00
Makefile adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00
README.md Update README.md 2017-08-08 14:09:37 -04:00

README.md

ADRV9364Z7020 SDR SOM

This folder contains the ADRV9364Z7020 SOM projects for each of the carrier boards.

Board Design Files

Directory/File Description
common/adrv9364z7020_bd.tcl ADRV9364Z7020 SOM module board design file.
common/ccbob_bd.tcl carrier, break out board design file.
common/ccusb_bd.tcl carrier, usb board design file.

BOB carrier design includes loopback daughtercards for connectivity testing.

Board Constraint Files

Directory/File Description
common/adrv9364z7020_constr.xdc     ADRV9364Z7020 SOM base constraints file.          
common/adrv9364z7020_constr_cmos.xdc ADRV9364Z7020 SOM CMOS mode constraints file.    
common/adrv9364z7020_constr_lvds.xdc ADRV9364Z7020 SOM LVDS mode constraints file.    
common/ccbob_constr.xdc carrier, break out board constraints file.
common/ccbox_constr.xdc             carrier, box board constraints file.        
common/ccusb_constr.xdc              carrier, usb board constraints file.         

Building, Generating Bit Files

[adrv9364z7020] cd ccbob_cmos

[adrv9364z7020/ccbob_cmos] make

The make in each carrier directory builds the corresponding project. The above example builds ADRV4CRR-BOB hardware bit files in CMOS mode.

Documentation