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pluto_hdl_adi/library/common
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Laszlo Nagy bfc8ec28c3 util_axis_fifo: instantiate block ram in async mode 
In cases when a shallow FIFO is requested the synthesizer infers distributed RAM
instead of block RAMs. This can be an issue when the clocks of the FIFO are
asynchronous since a timing path is created though the LUTs which implement the
memory, resulting in timing failures. Ignoring timing through the path is not a
solution since would lead to metastability.
This does not happens with block RAMs.

The solution is to use the ad_mem (block RAM) in case of async clocks and letting
the synthesizer do it's job in case of sync clocks for optimal resource utilization.
 		2018-04-11 15:09:54 +03:00
..
ad_addsub.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_adl5904_rst.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_axis_inf_rx.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_b2g.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_csc_1.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_csc_1_add.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_csc_1_mul.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_csc_CrYCb2RGB.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_csc_RGB2CrYCb.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_datafmt.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_dcfilter.v ad_dcfilter: Enable output registers in DSP48E1 2018-04-11 15:09:54 +03:00
ad_dds.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_dds_1.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_dds_sine.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_edge_detect.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_g2b.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_iqcor.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_mem.v util_axis_fifo: instantiate block ram in async mode 2018-04-11 15:09:54 +03:00
ad_mem_asym.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_pnmon.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_pps_receiver.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_pps_receiver_constr.ttcl axi_ad9361: Update constraint file 2017-08-04 16:20:33 +01:00
ad_rst.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_ss_422to444.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_ss_444to422.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_sysref_gen.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_tdd_control.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
ad_xcvr_rx_if.v ad_xcvr_rx_if: rx_ip_sof_d register has a width of 4 bits 2018-04-11 15:09:54 +03:00
axi_ctrlif.vhd license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
axi_streaming_dma_rx_fifo.vhd license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
axi_streaming_dma_tx_fifo.vhd license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
dma_fifo.vhd license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
pl330_dma_fifo.vhd license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_adc_channel.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_adc_common.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_axi.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_clkgen.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_clock_mon.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_dac_channel.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_dac_common.v up_dac_common: Explicitly define boolean parameter as a 1 bit value 2018-04-11 15:09:54 +03:00
up_delay_cntrl.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_hdmi_rx.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_hdmi_tx.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_pmod.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_tdd_cntrl.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_xfer_cntrl.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
up_xfer_status.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
util_axis_upscale.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
util_delay.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
util_pulse_gen.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00