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Lars-Peter Clausen 0e6cc95d0d pzsdr1/pzsdr2: audio_clkgen: Disable clock source buffer insertion 
Depending on the configuration of the clock source type of the input clock
the clocking wizard will instantiate all kinds of buffers on the input
clock signal.

For these particular projects there is no need to add any kind of buffer
since the source is already coming from a global clock buffer.  So set the
configuration accordingly.

Avoids the following warning:
	[Opt 31-32] Removing redundant IBUF since it is not being driven by a
	top-level port. i_system_wrapper/system_i/sys_audio_clkgen/inst/clkin1_ibufg
	Resolution: The tool has removed redundant IBUF. To resolve this
	warning, check for redundant IBUF in the input design.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2017-04-21 13:22:33 +02:00
..
ccbox_lvds pzsdr1/pzsdr2- ccbox added tws 2017-04-18 11:37:23 -04:00
ccbrk_cmos make updates 2017-03-20 16:05:18 -04:00
ccbrk_lvds make updates 2017-03-20 16:05:18 -04:00
ccusb_lvds make updates 2017-03-20 16:05:18 -04:00
common pzsdr1/pzsdr2: audio_clkgen: Disable clock source buffer insertion 2017-04-21 13:22:33 +02:00
Makefile pzsdr1: Added ccusb_lvds initial project 2016-11-22 16:58:34 +02:00
README.md pzsdr1- added readme 2016-11-17 11:29:01 -05:00

README.md

PicoZed SDR SOM (PZSDR2)

This folder contains the PZSDR2 SOM projects for each of the carrier boards.

Board Design Files

Directory/File Description
common/pzsdr2_bd.tcl pzsdr2 SOM module board design file.
common/ccbrk_bd.tcl carrier, break out board design file.
common/ccfmc_bd.tcl carrier, fmc board design file.
common/ccpci_bd.tcl carrier, pci-e board design file.
common/ccusb_bd.tcl carrier, usb board design file.

FMC & BRK carrier designs includes loopback daughtercards for connectivity testing.

Board Constraint Files

Directory/File Description
common/pzsdr2_constr.xdc pzsdr2 SOM base constraints file.
common/pzsdr2_constr_cmos.xdc pzsdr2 SOM CMOS mode constraints file.
common/pzsdr2_constr_lvds.xdc pzsdr2 SOM LVDS mode constraints file.
common/ccbrk_constr.xdc carrier, break out board constraints file.
common/ccfmc_constr.xdc carrier, fmc board constraints file.
common/ccpci_constr.xdc carrier, pci-e board constraints file.
common/ccusb_constr.xdc carrier, usb board constraints file.

FMC & BRK carrier designs includes loopback daughtercards for connectivity testing.

Building, Generating Bit Files

[pzsdr2] cd ccbrk_cmos

[pzsdr2/ccbrk_cmos] make

The make in each carrier directory builds the corresponding project. The above example builds PZSDR2-CCBRK hardware bit files in CMOS mode.

Documentation