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AndreiGrozav b5dfdcfb84 axi_adc_trigger: Add cascade support. 
- Add embedded trigger as an option. The use of the embedded trigger as an
option in the data stream is done for further processing, keeping the data
synchronized with the trigger.
When instrument (module) trigger is desired (logic_analyzer - adc_trigger),
a small propagation time is required, hence the need to remove the
util_extract(trigger extract) module from the data path.

- Add more options for the IO triggering. This will open the door for multiple
M2k synchronization(triggering).
trigger_o mux:
1 - trigger flag (from regmap)
2 - external pin trigger (Ti)
3 - external pin trigger (To)
4 - internal adc trigger
5 - logic analyzer trigger

The signal passed to trigger_o must not be delayed, but the new value has to be
kept for a short period, 1ms (100000 clock cycles), to reduce switch noises in
the system.

The axi_adc_trigger handles 3 output triggers:
- trigger_o - external trigger (1 clock cycle delay)
- trigger_out - signals on dmac/fifo_wr_sync the start of a new transfer.
A variable fifo depth is present in the data path, which delays the data
arriving at the DMA with 3 clock cycles. By coincidence, the external trigger
is synchronized and detected on 3 clock cycles. To get a maximum optimization
the trigger_out will be delayed with 3 clock cycles for internal triggers and
directly forwarded in the case of an external trigger.
- trigger_out_la (cascade trigger for logic_analyzer - m2k example)

Because the trigger_out_la must have a small delay, to get a realible
instrument triggering mechanism, a 1 delay clock cycle must be added on the
trigger paths, to avoid creating a closed combinatorial loop.

Increase pcore version. The major version 3 is used to describe the instrument
trigger updates.
 		2019-08-22 18:06:10 +03:00
..
axi_ad5766 up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
axi_ad6676 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_ad7616 ad7616_bugfix: read data multiplexation 2019-08-22 17:59:00 +03:00
axi_ad9122 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9144 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9152 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9162 Fix copy-paste typo in *_ip.tcl 2019-07-29 15:37:30 +03:00
axi_ad9250 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9265 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_ad9361 axi_ad9361/intel: Rename varibles with alt_* pre-fix 2019-06-29 06:53:51 +03:00
axi_ad9371 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9434 Fix copy-paste typo in *_ip.tcl 2019-07-29 15:37:30 +03:00
axi_ad9467 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_ad9625 Fix copy-paste typo in *_ip.tcl 2019-07-29 15:37:30 +03:00
axi_ad9671 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9680 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9684 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_ad9739a library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_ad9963 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_adc_decimate up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
axi_adc_trigger axi_adc_trigger: Add cascade support. 2019-08-22 18:06:10 +03:00
axi_adrv9009 scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
axi_clkgen library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_dac_interpolate up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
axi_dmac axi_dmac: fix timing constraints 2019-08-08 14:26:07 +03:00
axi_fan_control up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
axi_fmcadc5_sync library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_generic_adc axi_generic_adc: infer clock for input adc_clk 2019-08-22 10:39:59 +03:00
axi_gpreg library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_hdmi_rx library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_hdmi_tx Fix copy-paste typo in *_ip.tcl 2019-07-29 15:37:30 +03:00
axi_i2s_adi library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_intr_monitor library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_laser_driver axi_laser_driver: Set default value for sequencer offset 2019-08-08 14:26:07 +03:00
axi_logic_analyzer up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
axi_mc_controller library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_mc_current_monitor library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_mc_speed library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_pulse_gen axi_pulse_gen_regmap: Rename the clk output to clk_out 2019-08-08 14:26:07 +03:00
axi_rd_wr_combiner library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_spdif_rx library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_spdif_tx library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_sysid system_id: added axi_sysid ip core and tcl 2019-08-06 16:53:11 +03:00
axi_usb_fx3 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
cn0363 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
common Add generic fir filters processes for RF projects 2019-08-20 16:24:47 +03:00
cordic_demod library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
intel up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
interfaces library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
jesd204 up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
scripts ad_ghdl_dir: Fix global variable name 2019-07-23 10:29:37 +01:00
spi_engine up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
sysid_rom system_id: added axi_sysid ip core and tcl 2019-08-06 16:53:11 +03:00
util_adcfifo scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
util_axis_fifo library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_axis_resize library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_axis_upscale library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_bsplit scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
util_cdc library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_cic library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_dacfifo scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
util_dec256sinc24b library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_delay library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_extract library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_fir_dec library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_fir_int library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_gmii_to_rgmii library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_i2c_mixer library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_mfifo library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_pack scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
util_pulse_gen library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_rfifo scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
util_sigma_delta_spi library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_tdd_sync library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_var_fifo library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_wfifo scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
xilinx axi_dacfifo: Add don't touch for the constraints to apply 2019-08-01 18:15:45 +03:00
Makefile axi_laser_driver: Initial commit 2019-08-08 14:26:07 +03:00