65 lines
4.4 KiB
Plaintext
65 lines
4.4 KiB
Plaintext
<: :>
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<: set ComponentName [getComponentNameString] :>
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<: setOutputDirectory "./sim/" :>
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<: setFileName ${ComponentName}_pkg :>
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<: setFileExtension ".sv" :>
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<: set id [get_property MODELPARAM_VALUE.ID] :>
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<: set dma_data_width_src [get_property MODELPARAM_VALUE.DMA_DATA_WIDTH_SRC] :>
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<: set dma_data_width_dest [get_property MODELPARAM_VALUE.DMA_DATA_WIDTH_DEST] :>
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<: set dma_length_width [get_property MODELPARAM_VALUE.DMA_LENGTH_WIDTH] :>
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<: set dma_2d_transfer [get_property MODELPARAM_VALUE.DMA_2D_TRANSFER] :>
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<: set async_clk_req_src [get_property MODELPARAM_VALUE.ASYNC_CLK_REQ_SRC] :>
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<: set async_clk_src_dest [get_property MODELPARAM_VALUE.ASYNC_CLK_SRC_DEST] :>
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<: set async_clk_dest_req [get_property MODELPARAM_VALUE.ASYNC_CLK_DEST_REQ] :>
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<: set axi_slice_dest [get_property MODELPARAM_VALUE.AXI_SLICE_DEST] :>
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<: set axi_slice_src [get_property MODELPARAM_VALUE.AXI_SLICE_SRC] :>
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<: set sync_transfer_start [get_property MODELPARAM_VALUE.SYNC_TRANSFER_START] :>
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<: set cyclic [get_property MODELPARAM_VALUE.CYCLIC] :>
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<: set dma_axi_protocol_dest [get_property MODELPARAM_VALUE.DMA_AXI_PROTOCOL_DEST] :>
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<: set dma_axi_protocol_src [get_property MODELPARAM_VALUE.DMA_AXI_PROTOCOL_SRC] :>
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<: set dma_type_dest [get_property MODELPARAM_VALUE.DMA_TYPE_DEST] :>
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<: set dma_type_src [get_property MODELPARAM_VALUE.DMA_TYPE_SRC] :>
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<: set dma_axi_addr_width [get_property MODELPARAM_VALUE.DMA_AXI_ADDR_WIDTH] :>
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<: set max_bytes_per_burst [get_property MODELPARAM_VALUE.MAX_BYTES_PER_BURST] :>
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<: set fifo_size [get_property MODELPARAM_VALUE.FIFO_SIZE] :>
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<: set axi_id_width_src [get_property MODELPARAM_VALUE.AXI_ID_WIDTH_SRC] :>
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<: set axi_id_width_dest [get_property MODELPARAM_VALUE.AXI_ID_WIDTH_DEST] :>
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<: set disable_debug_registers [get_property MODELPARAM_VALUE.DISABLE_DEBUG_REGISTERS] :>
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<: proc b2i {b} { if {$b==true} {return 1} else {return 0}} :>
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///////////////////////////////////////////////////////////////////////////
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//NOTE: This file has been automatically generated by Vivado.
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///////////////////////////////////////////////////////////////////////////
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package <=: ComponentName :>_pkg;
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///////////////////////////////////////////////////////////////////////////
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// These parameters are named after the component for use in your verification
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// environment.
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///////////////////////////////////////////////////////////////////////////
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parameter <=: ComponentName :>_ID = <=: $id :>;
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parameter <=: ComponentName :>_DMA_DATA_WIDTH_SRC = <=: $dma_data_width_src :>;
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parameter <=: ComponentName :>_DMA_DATA_WIDTH_DEST = <=: $dma_data_width_dest :>;
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parameter <=: ComponentName :>_DMA_LENGTH_WIDTH = <=: $dma_length_width :>;
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parameter <=: ComponentName :>_DMA_2D_TRANSFER = <=: b2i $dma_2d_transfer :>;
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parameter <=: ComponentName :>_ASYNC_CLK_REQ_SRC = <=: b2i $async_clk_req_src :>;
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parameter <=: ComponentName :>_ASYNC_CLK_SRC_DEST = <=: b2i $async_clk_src_dest :>;
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parameter <=: ComponentName :>_ASYNC_CLK_DEST_REQ = <=: b2i $async_clk_dest_req :>;
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parameter <=: ComponentName :>_AXI_SLICE_DEST = <=: b2i $axi_slice_dest :>;
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parameter <=: ComponentName :>_AXI_SLICE_SRC = <=: b2i $axi_slice_src :>;
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parameter <=: ComponentName :>_SYNC_TRANSFER_START = <=: b2i $sync_transfer_start :>;
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parameter <=: ComponentName :>_CYCLIC = <=: b2i $cyclic :>;
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parameter <=: ComponentName :>_DMA_AXI_PROTOCOL_DEST = <=: $dma_axi_protocol_dest :>;
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parameter <=: ComponentName :>_DMA_AXI_PROTOCOL_SRC = <=: $dma_axi_protocol_src :>;
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parameter <=: ComponentName :>_DMA_TYPE_DEST = <=: $dma_type_dest :>;
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parameter <=: ComponentName :>_DMA_TYPE_SRC = <=: $dma_type_src :>;
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parameter <=: ComponentName :>_DMA_AXI_ADDR_WIDTH = <=: $dma_axi_addr_width :>;
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parameter <=: ComponentName :>_MAX_BYTES_PER_BURST = <=: $max_bytes_per_burst :>;
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parameter <=: ComponentName :>_FIFO_SIZE = <=: $fifo_size :>;
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parameter <=: ComponentName :>_AXI_ID_WIDTH_SRC = <=: $axi_id_width_src :>;
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parameter <=: ComponentName :>_AXI_ID_WIDTH_DEST = <=: $axi_id_width_dest :>;
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parameter <=: ComponentName :>_DISABLE_DEBUG_REGISTERS = <=: b2i $disable_debug_registers :>;
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//////////////////////////////////////////////////////////////////////////
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endpackage : <=: ComponentName :>_pkg
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