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Istvan Csomortani b765be568f up_gt_channel: Delete the register, which stores transceiver type 
Transceiver type is stored in axi_jesd_gt/up_gt only.
 		2015-09-29 14:23:42 +03:00
library up_gt_channel: Delete the register, which stores transceiver type 2015-09-29 14:23:42 +03:00
projects ad9739a_fmc: Common, reduced DMA fifo size 2015-09-28 12:19:23 +03:00
.gitattributes Add .gitattributes file 2015-07-01 18:43:51 +02:00
.gitignore ignore gui 2015-09-22 16:32:02 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update to Quartus 15.0. Removed release candidate note 2015-08-13 11:55:23 +03:00

README.md

#HDL Reference Designs

Analog Devices HDL libraries and projects

###Tools version:

###Documentation and support

For first time users, it is highly recommended to go through our HDL user guide.

For support please visit our FPGA Reference Designs Support Community on EngineerZone.