Istvan Csomortani 596d0fa3fb axi_ad9122: Add a constraint for a false path		2016-12-16 12:07:40 +00:00
..
Makefile	updated makefiles	2016-12-09 23:06:41 +02:00
axi_ad9122.v	axi_ad9122: Update core to the new DRP interface	2016-09-21 16:09:55 +03:00
axi_ad9122_channel.v	Add up_dac_channel missing connections	2016-10-12 13:20:26 +03:00
axi_ad9122_constr.sdc	axi_ad9122: Add Altera support for the core	2016-10-24 11:43:12 +03:00
axi_ad9122_constr.xdc	axi_ad9122: Add a constraint for a false path	2016-12-16 12:07:40 +00:00
axi_ad9122_core.v	Add up_dac_common missing connections	2016-10-12 13:20:26 +03:00
axi_ad9122_hw.tcl	axi_ad9122: Update hw tcl script for altera	2016-12-06 15:24:19 +02:00
axi_ad9122_if.v	axi_ad9122: Add loaden port for altera support	2016-12-06 15:24:20 +02:00
axi_ad9122_ip.tcl	lib_refactoring: Fix path of the IO macros	2016-08-08 15:07:19 +03:00