Adrian Costina 8ebc8fe4e2 updated makefiles		2016-12-09 23:06:41 +02:00
..
Makefile	updated makefiles	2016-12-09 23:06:41 +02:00
axi_ad9684.v	axi_ad9684: Fixed up_drp_*data width	2016-10-12 13:20:26 +03:00
axi_ad9684_channel.v	library/ adc parameter changes	2016-09-23 13:44:47 -04:00
axi_ad9684_constr.sdc	axi_ad9684: Add Altera support for the core	2016-10-24 11:43:22 +03:00
axi_ad9684_constr.xdc	axi_ad9684: Fix constraint file	2016-02-12 14:38:59 +02:00
axi_ad9684_hw.tcl	axi_ad9684: Update hw tcl script for altera	2016-12-06 15:24:20 +02:00
axi_ad9684_if.v	axi_ad9684: Add loaden and phase ports for altera support	2016-12-06 15:24:20 +02:00
axi_ad9684_ip.tcl	lib_refactoring: Fix path of the IO macros	2016-08-08 15:07:19 +03:00
axi_ad9684_pnmon.v	axi_ad9684: Fix the PN9 PRBS sequence monitor	2016-09-28 10:47:16 +03:00