Lars-Peter Clausen 1bb5b6e55f adv7511: zc706: Fix ddr and fixed_io signal names ... The toplevel input/output signal names are lower case, but the signals connected to the system_wrapper are upper case. Since verilog is case sensitive this leaves the toplevel input/output signals unconnected. Fix this by using lower case names everywhere. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2015-04-23 14:33:47 +02:00
..
Makefile	Makefile: Added top level Makefile. Modified behavior of clean and clean-all	2015-04-17 17:22:38 +03:00
system_bd.tcl	adv7511_zc706: Interrupts and framework updates	2015-03-20 13:30:24 +02:00
system_project.tcl	adv7511_zc706: Interrupts and framework updates	2015-03-20 13:30:24 +02:00
system_top.v	adv7511: zc706: Fix ddr and fixed_io signal names	2015-04-23 14:33:47 +02:00