bd6c76f4ab
The HP memory ports on ZYNQ are AXI3. The AXI-DMAC supports both native AXI3 and AXI4, by configuring it for AXI3 there is no need for a protocol converter inside the interconnect, that connects the DMAC to the HP port. In addition to that also set the data width for the DMAC on the HP port side to 64 so there is no need for a memory width converter in the interconnect. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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| common | ||
| zc702 | ||
| zc706 | ||
| Makefile | ||