zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
pluto_hdl_adi/projects/ad9081_fmca_ebz
History
Bogdan Luncan 80fe536863 ad9081/vck190/system_project: Change the default profile 
ADC Mode 26: L=8, M=8, S=2, NP=12, LaneRate=24.75 GSPS
DAC Mode 24: L=8, M=8, S=2, NP=12, LaneRate=24.75 GSPS

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 		2023-05-16 12:13:55 +03:00
..
a10soc ad9081: Parameters and header update 2023-05-10 12:59:58 +03:00
common ad9081: Proper reset sequence for versal transceivers 2023-05-16 12:13:55 +03:00
vck190 ad9081/vck190/system_project: Change the default profile 2023-05-16 12:13:55 +03:00
vcu118 ad9081: Parameters and header update 2023-05-10 12:59:58 +03:00
vcu128 ad9081: Parameters and header update 2023-05-10 12:59:58 +03:00
zc706 ad9081: Parameters and header update 2023-05-10 12:59:58 +03:00
zcu102 ad9081: Parameters and header update 2023-05-10 12:59:58 +03:00
Makefile library & projects: Update Makefiles 2023-01-27 11:54:05 +02:00
Readme.md start adding some doc to the ./projects directory 2021-11-10 14:01:06 +02:00

Readme.md

AD9081-FMCA-EBZ HDL Project

Here are some pointers to help you: