107 lines
5.2 KiB
Verilog
107 lines
5.2 KiB
Verilog
// ***************************************************************************
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// ***************************************************************************
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// Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
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//
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// Each core or library found in this collection may have its own licensing terms.
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// The user should keep this in in mind while exploring these cores.
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//
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// Redistribution and use in source and binary forms,
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// with or without modification of this file, are permitted under the terms of either
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// (at the option of the user):
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//
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// 1. The GNU General Public License version 2 as published by the
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// Free Software Foundation, which can be found in the top level directory, or at:
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// https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html
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//
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// OR
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//
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// 2. An ADI specific BSD license as noted in the top level directory, or on-line at:
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// https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
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//
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// ***************************************************************************
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// ***************************************************************************
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`timescale 1ns/100ps
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module axi_ad9144_if #(
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parameter DEVICE_TYPE = 0) (
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// jesd interface
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// tx_clk is (line-rate/40)
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input tx_clk,
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output reg [255:0] tx_data,
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// dac interface
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output dac_clk,
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input dac_rst,
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input [15:0] dac_data_0_0,
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input [15:0] dac_data_0_1,
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input [15:0] dac_data_0_2,
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input [15:0] dac_data_0_3,
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input [15:0] dac_data_1_0,
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input [15:0] dac_data_1_1,
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input [15:0] dac_data_1_2,
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input [15:0] dac_data_1_3,
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input [15:0] dac_data_2_0,
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input [15:0] dac_data_2_1,
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input [15:0] dac_data_2_2,
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input [15:0] dac_data_2_3,
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input [15:0] dac_data_3_0,
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input [15:0] dac_data_3_1,
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input [15:0] dac_data_3_2,
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input [15:0] dac_data_3_3);
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// internal registers
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// reorder data for the jesd links
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assign dac_clk = tx_clk;
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always @(posedge dac_clk) begin
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if (dac_rst == 1'b1) begin
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tx_data <= 256'd0;
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end else begin
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tx_data[255:248] <= (DEVICE_TYPE == 1) ? dac_data_3_0[ 7: 0] : dac_data_3_3[ 7: 0];
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tx_data[247:240] <= (DEVICE_TYPE == 1) ? dac_data_3_1[ 7: 0] : dac_data_3_2[ 7: 0];
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tx_data[239:232] <= (DEVICE_TYPE == 1) ? dac_data_3_2[ 7: 0] : dac_data_3_1[ 7: 0];
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tx_data[231:224] <= (DEVICE_TYPE == 1) ? dac_data_3_3[ 7: 0] : dac_data_3_0[ 7: 0];
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tx_data[223:216] <= (DEVICE_TYPE == 1) ? dac_data_3_0[15: 8] : dac_data_3_3[15: 8];
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tx_data[215:208] <= (DEVICE_TYPE == 1) ? dac_data_3_1[15: 8] : dac_data_3_2[15: 8];
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tx_data[207:200] <= (DEVICE_TYPE == 1) ? dac_data_3_2[15: 8] : dac_data_3_1[15: 8];
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tx_data[199:192] <= (DEVICE_TYPE == 1) ? dac_data_3_3[15: 8] : dac_data_3_0[15: 8];
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tx_data[191:184] <= (DEVICE_TYPE == 1) ? dac_data_2_0[ 7: 0] : dac_data_2_3[ 7: 0];
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tx_data[183:176] <= (DEVICE_TYPE == 1) ? dac_data_2_1[ 7: 0] : dac_data_2_2[ 7: 0];
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tx_data[175:168] <= (DEVICE_TYPE == 1) ? dac_data_2_2[ 7: 0] : dac_data_2_1[ 7: 0];
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tx_data[167:160] <= (DEVICE_TYPE == 1) ? dac_data_2_3[ 7: 0] : dac_data_2_0[ 7: 0];
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tx_data[159:152] <= (DEVICE_TYPE == 1) ? dac_data_2_0[15: 8] : dac_data_2_3[15: 8];
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tx_data[151:144] <= (DEVICE_TYPE == 1) ? dac_data_2_1[15: 8] : dac_data_2_2[15: 8];
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tx_data[143:136] <= (DEVICE_TYPE == 1) ? dac_data_2_2[15: 8] : dac_data_2_1[15: 8];
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tx_data[135:128] <= (DEVICE_TYPE == 1) ? dac_data_2_3[15: 8] : dac_data_2_0[15: 8];
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tx_data[127:120] <= (DEVICE_TYPE == 1) ? dac_data_1_0[ 7: 0] : dac_data_1_3[ 7: 0];
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tx_data[119:112] <= (DEVICE_TYPE == 1) ? dac_data_1_1[ 7: 0] : dac_data_1_2[ 7: 0];
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tx_data[111:104] <= (DEVICE_TYPE == 1) ? dac_data_1_2[ 7: 0] : dac_data_1_1[ 7: 0];
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tx_data[103: 96] <= (DEVICE_TYPE == 1) ? dac_data_1_3[ 7: 0] : dac_data_1_0[ 7: 0];
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tx_data[ 95: 88] <= (DEVICE_TYPE == 1) ? dac_data_1_0[15: 8] : dac_data_1_3[15: 8];
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tx_data[ 87: 80] <= (DEVICE_TYPE == 1) ? dac_data_1_1[15: 8] : dac_data_1_2[15: 8];
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tx_data[ 79: 72] <= (DEVICE_TYPE == 1) ? dac_data_1_2[15: 8] : dac_data_1_1[15: 8];
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tx_data[ 71: 64] <= (DEVICE_TYPE == 1) ? dac_data_1_3[15: 8] : dac_data_1_0[15: 8];
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tx_data[ 63: 56] <= (DEVICE_TYPE == 1) ? dac_data_0_0[ 7: 0] : dac_data_0_3[ 7: 0];
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tx_data[ 55: 48] <= (DEVICE_TYPE == 1) ? dac_data_0_1[ 7: 0] : dac_data_0_2[ 7: 0];
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tx_data[ 47: 40] <= (DEVICE_TYPE == 1) ? dac_data_0_2[ 7: 0] : dac_data_0_1[ 7: 0];
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tx_data[ 39: 32] <= (DEVICE_TYPE == 1) ? dac_data_0_3[ 7: 0] : dac_data_0_0[ 7: 0];
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tx_data[ 31: 24] <= (DEVICE_TYPE == 1) ? dac_data_0_0[15: 8] : dac_data_0_3[15: 8];
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tx_data[ 23: 16] <= (DEVICE_TYPE == 1) ? dac_data_0_1[15: 8] : dac_data_0_2[15: 8];
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tx_data[ 15: 8] <= (DEVICE_TYPE == 1) ? dac_data_0_2[15: 8] : dac_data_0_1[15: 8];
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tx_data[ 7: 0] <= (DEVICE_TYPE == 1) ? dac_data_0_3[15: 8] : dac_data_0_0[15: 8];
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end
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end
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endmodule
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// ***************************************************************************
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// ***************************************************************************
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