f01d7e5951
* SPI Engine: fix early sdi data clear In case an SPI read was immediately followed by a cs assert, the sdi register was being cleared one cycle too soon, so that the data being passed on was always 'b0. Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> |
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axi_spi_engine | ||
interfaces | ||
scripts | ||
spi_axis_reorder | ||
spi_engine_execution | ||
spi_engine_interconnect | ||
spi_engine_offload |