54 lines
2.2 KiB
Tcl
54 lines
2.2 KiB
Tcl
create_bd_port -dir I ref_clk_125
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create_bd_port -dir O reset
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create_bd_port -dir O -from 1 -to 0 -type data speed_mode_a
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create_bd_port -dir O -from 1 -to 0 -type data speed_mode_b
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ad_ip_instance gmii_to_rgmii gmii_to_rgmii_0
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ad_ip_parameter gmii_to_rgmii_0 CONFIG.SupportLevel Include_Shared_Logic_in_Core
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# 200MHz for 7 series; 375 for ultrascale
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ad_ip_instance clk_wiz clk_wiz
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ad_ip_parameter clk_wiz CONFIG.PRIM_IN_FREQ 125
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ad_ip_parameter clk_wiz CONFIG.MMCM_CLKIN1_PERIOD 8.000
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ad_ip_parameter clk_wiz CONFIG.CLKOUT1_REQUESTED_OUT_FREQ 375
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ad_ip_parameter clk_wiz CONFIG.PRIM_SOURCE "No_buffer"
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make_bd_intf_pins_external [get_bd_intf_pins gmii_to_rgmii_0/MDIO_PHY]
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make_bd_intf_pins_external [get_bd_intf_pins gmii_to_rgmii_0/RGMII]
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ad_ip_instance proc_sys_reset proc_rgmii_reset
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ad_connect gmii_to_rgmii_0/clkin clk_wiz/clk_out1
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ad_connect ref_clk_125 clk_wiz/clk_in1
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ad_connect sys_rstgen/peripheral_reset clk_wiz/reset
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ad_connect proc_rgmii_reset/ext_reset_in sys_rstgen/peripheral_reset
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ad_connect reset proc_rgmii_reset/peripheral_reset
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ad_connect proc_rgmii_reset/dcm_locked clk_wiz/locked
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ad_connect proc_rgmii_reset/slowest_sync_clk clk_wiz/clk_out1
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ad_connect proc_rgmii_reset/peripheral_reset gmii_to_rgmii_0/tx_reset
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ad_connect gmii_to_rgmii_0/rx_reset proc_rgmii_reset/peripheral_reset
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make_bd_pins_external [get_bd_pins gmii_to_rgmii_0/clock_speed]
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ad_ip_instance gmii_to_rgmii gmii_to_rgmii_1
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ad_ip_parameter gmii_to_rgmii_1 CONFIG.SupportLevel {Include_Shared_Logic_in_Example_Design}
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make_bd_intf_pins_external [get_bd_intf_pins gmii_to_rgmii_1/MDIO_PHY]
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make_bd_intf_pins_external [get_bd_intf_pins gmii_to_rgmii_1/RGMII]
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ad_connect gmii_to_rgmii_1/ref_clk_in gmii_to_rgmii_0/ref_clk_out
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ad_connect gmii_to_rgmii_1/mmcm_locked_in gmii_to_rgmii_0/mmcm_locked_out
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ad_connect gmii_to_rgmii_1/gmii_clk_125m_in gmii_to_rgmii_0/gmii_clk_125m_out
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ad_connect gmii_to_rgmii_1/gmii_clk_25m_in gmii_to_rgmii_0/gmii_clk_25m_out
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ad_connect gmii_to_rgmii_1/gmii_clk_2_5m_in gmii_to_rgmii_0/gmii_clk_2_5m_out
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ad_connect proc_rgmii_reset/peripheral_reset gmii_to_rgmii_1/tx_reset
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ad_connect gmii_to_rgmii_1/rx_reset proc_rgmii_reset/peripheral_reset
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ad_connect gmii_to_rgmii_0/speed_mode speed_mode_a
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ad_connect gmii_to_rgmii_1/speed_mode speed_mode_b
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