ae09b8a1bb
The busy_sync pulse was replaced by an axi pwm generator IP, so the constraint in xdc file is no longer needed. |
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common | ||
coraz7s | ||
de10nano | ||
zed | ||
Makefile | ||
Readme.md |
Readme.md
CN0561 HDL Project
Here are some pointers to help you:
- Board Product Page
- Parts: 24-Bit, 4-Channel Simultaneous Sampling 1.5 MSPS Precision Alias Free ADC
- Project Doc: https://wiki.analog.com/resources/eval/user-guides/circuits-from-the-lab/cn0561
- HDL Doc: https://wiki.analog.com/resources/eval/user-guides/cn0561/hdl
- Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers-all
- NO-OS Drivers: https://wiki.analog.com/resources/tools-software/uc-drivers/ad713x