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Lars-Peter Clausen cf5208122a axi_dmac: Increase default store-and-forward memory size to 8 bursts 
A larger store-and-forward memory provides better protection against worst
case memory interface latencies by being able to store more data before
over-/underflowing.

Based on empirical testing it was found that using a size of 4 bursts can
still result in underflows/overflows under certain conditions. These do not
happen when using a size of 8 bursts.

This change does not significantly increase resource consumption. Both on
Intel and Xilinx the block RAM has a minimum depth of 512 entries. With a
default burst length of 16 beats that allows for up to 32 bursts without
requiring additional block RAM.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2018-06-05 14:28:40 +02:00
library axi_dmac: Increase default store-and-forward memory size to 8 bursts 2018-06-05 14:28:40 +02:00
projects zcu102: updated IOSTANDARD of Bank 44 IOs to match VCCO 3.3V 2018-06-05 08:52:50 +01:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Move Altera IP core dependency tracking to library Makefiles 2018-04-11 15:09:54 +03:00
LICENSE license: GPL must be GPL v2 2017-05-31 18:18:45 +03:00
LICENSE_ADIBSD license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_GPL2 license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_LGPL license: Add top level license files 2017-05-29 09:57:39 +03:00
Makefile Add quiet mode to the Makefile system 2018-04-11 15:09:54 +03:00
README.md README: Remove the Documentation section, it's redundant 2018-03-07 12:28:40 +00:00
quiet.mk quiet.mk: Fix newline generation in error message 2018-04-12 18:19:43 +02:00

README.md

HDL Reference Designs

Analog Devices Inc. HDL libraries and projects.

Getting started

This repository supports reference designs for different Analog Devices boards based on Intel and Xilinx FPGA development boards or standalone.

Prerequisites

or

Please make sure that you have the required tool version.

How to build a project

For building a projects, you have to use the GNU Make tool. If you're a Windows user please checkout this page, to see how you can install this tool.

To build a project, checkout the latest release, after that just cd to the project that you want to build and run make:

 [~]cd projects/fmcomms2/zc706
 [~]make

A more comprehensive build guide can be found under the following link: https://wiki.analog.com/resources/fpga/docs/build

Software

In general all the projects have no-OS (baremetal) and a Linux support. See no-OS or Linux for more information.

Which branch should I use?

  • If you want to use the most stable code base, always use the latest release branch.

  • If you want to use the greatest and latest, check out the master branch.

License

In this HDL repository, there are many different and unique modules, consisting of various HDL (Verilog or VHDL) components. The individual modules are developed independently, and may be accompanied by separate and unique license terms.

The user should read each of these license terms, and understand the freedoms and responsibilities that he or she has by using this source/core.

See LICENSE for more details. The separate license files cab be found here:

Comprehensive user guide

See HDL User Guide for a more detailed guide.

Support

Feel free to ask any question at EngineerZone.