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Adrian Costina d0a8b4a63c kc705,common: Mem_interconnect maximize performance 
For FMCOMMS1, when both the ADC and DAC DMAs are active, the system was
unstable. With this fix, it the system seems to be stable.
 		2014-04-03 15:59:33 +03:00
library up_gt: eyescan delay bug fix 2014-04-02 16:45:41 -04:00
projects kc705,common: Mem_interconnect maximize performance 2014-04-03 15:59:33 +03:00
.gitignore added gitignore 2014-03-05 10:47:16 -05:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md Update README.md 2014-03-13 14:03:15 -04:00

README.md

hdl

Analog Devices HDL libraries and projects

http://wiki.analog.com/resources/fpga/docs/hdl/github

http://wiki.analog.com/resources/fpga/docs/hdl/regmap