pluto_hdl_adi/projects/common
Adrian Costina d0a8b4a63c kc705,common: Mem_interconnect maximize performance
For FMCOMMS1, when both the ADC and DAC DMAs are active, the system was
unstable. With this fix, it the system seems to be stable.
2014-04-03 15:59:33 +03:00
..
a5gt altera a5gt fmcjesdadc1 setup 2014-04-01 11:46:37 -04:00
ac701 MicroBlaze base system: Fix a few net names 2014-04-01 10:40:35 +03:00
kc705 kc705,common: Mem_interconnect maximize performance 2014-04-03 15:59:33 +03:00
vc707 MicroBlaze base system: Fix a few net names 2014-04-01 10:40:35 +03:00
zc702 Zynq Base System: Reset is synchronized to lowest system clock 2014-03-26 17:58:14 +02:00
zc706 Zynq Base System: Reset is synchronized to lowest system clock 2014-03-26 17:58:14 +02:00
zed Zynq Base System: Reset is synchronized to lowest system clock 2014-03-26 17:58:14 +02:00