c8d4f956e7
Update the readback logic of the FIFO. The controller uses a relative address counter, which counts the DMA beats. The readback logic uses the last value of that counter to define the wrapping address. The aditional data from the last AXI burst, if there is any, will be dropped. |
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.. | ||
Makefile | ||
axi_dacfifo.v | ||
axi_dacfifo_constr.xdc | ||
axi_dacfifo_dac.v | ||
axi_dacfifo_ip.tcl | ||
axi_dacfifo_rd.v | ||
axi_dacfifo_wr.v |