pluto_hdl_adi/projects/fmcomms2/zc706pr
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
..
Makefile fmcomms2: Update Makefiles 2017-01-13 14:16:21 +02:00
system_bd.tcl fmcomms2/zc706pr: Update PR design 2015-10-09 13:23:42 +03:00
system_constr.xdc fmcomms2/zc706pr- prcfg is a single clock synchronous design 2017-02-06 10:59:18 -05:00
system_project.tcl enable partial reconfiguration mode 2017-01-27 09:26:53 -05:00
system_top.v all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00