1312 lines
71 KiB
Tcl
1312 lines
71 KiB
Tcl
## AUTO GENERATED BY util_adxcvr.pl, DO NOT MODIFY!
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
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adi_ip_create util_adxcvr
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adi_ip_files util_adxcvr [list \
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"$ad_hdl_dir/library/scripts/adi_xilinx_device_info_enc.tcl" \
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"$ad_hdl_dir/library/jesd204/jesd204_common/sync_header_align.v" \
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"util_adxcvr_constr.xdc" \
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"util_adxcvr_xcm.v" \
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"util_adxcvr_xch.v" \
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"util_adxcvr.v" \
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"bd/bd.tcl" ]
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adi_ip_properties_lite util_adxcvr
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adi_ip_bd util_adxcvr "bd/bd.tcl"
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set_property company_url {https://wiki.analog.com/resources/fpga/docs/util_xcvr} [ipx::current_core]
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adi_ip_add_core_dependencies { \
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analog.com:user:util_cdc:1.0 \
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}
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set cc [ipx::current_core]
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# Arrange GUI page layout
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set page0 [ipgui::get_pagespec -name "Page 0" -component $cc]
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# Link layer mode
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set p [ipgui::get_guiparamspec -name "LINK_MODE" -component $cc]
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ipgui::move_param -component $cc -order 0 $p -parent $page0
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set_property -dict [list \
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"display_name" "Link Layer mode" \
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"tooltip" "Link Layer mode" \
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"widget" "comboBox" \
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] $p
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set_property -dict [list \
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value_validation_type pairs \
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value_validation_pairs {64B66B 2 8B10B 1} \
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] [ipx::get_user_parameters $p -of_objects $cc]
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# Data width selection
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set param [ipx::get_user_parameters DATA_PATH_WIDTH -of_objects $cc]
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set_property -dict [list \
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enablement_tcl_expr {$LINK_MODE==1} \
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value_tcl_expr {expr $LINK_MODE*4} \
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] $param
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set p [ipgui::get_guiparamspec -name "RX_LANE_RATE" -component $cc]
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ipgui::move_param -component $cc -order 1 $p -parent $page0
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set_property -dict [list \
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display_name {Rx Lane Rate (Gbps)} \
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widget {textEdit} \
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] $p
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set_property -dict [list \
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value_resolve_type user \
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value 12.5 \
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value_format float \
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] [ipx::get_user_parameters $p -of_objects $cc]
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set p [ipgui::get_guiparamspec -name "TX_LANE_RATE" -component $cc]
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ipgui::move_param -component $cc -order 2 $p -parent $page0
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set_property -dict [list \
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display_name {Tx Lane Rate (Gbps)} \
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widget {textEdit} \
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] $p
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set_property -dict [list \
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value_resolve_type user \
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value 12.5 \
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value_format float \
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] [ipx::get_user_parameters $p -of_objects $cc]
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ipx::remove_all_bus_interface [ipx::current_core]
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ipx::infer_bus_interface up_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface cpll_ref_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface qpll_ref_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface qpll_ref_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface qpll_ref_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface qpll_ref_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_3 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_4 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_5 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_6 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_7 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_8 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_9 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_10 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_11 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_12 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_13 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_14 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_15 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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for {set n 0} {$n < 16} {incr n} {
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ipx::infer_bus_interface rx_clk_2x_$n xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_clk_2x_$n xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface rx_out_clk_div2_$n xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface tx_out_clk_div2_$n xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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}
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ipx::infer_bus_interface up_rstn xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_0 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_1 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_2 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_3 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_4 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_5 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_6 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_7 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_9 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_10 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_11 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_13 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_14 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_rx_rst_15 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_0 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_1 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_2 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_3 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_4 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_5 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_6 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_7 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_9 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_10 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_11 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_13 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_14 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_tx_rst_15 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_0 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_1 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_2 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_3 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_4 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_5 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_6 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_7 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_9 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_10 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_11 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_13 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_14 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_cpll_rst_15 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_qpll_rst_0 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_qpll_rst_4 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_qpll_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_qpll_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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for {set n 0} {$n < 16} {incr n} {
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if {($n%4) == 0} {
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ipx::associate_bus_interfaces -clock cpll_ref_clk_${n} -reset up_qpll_rst_${n} -remove [ipx::current_core]
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}
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ipx::associate_bus_interfaces -clock cpll_ref_clk_${n} -reset up_cpll_rst_${n} -remove [ipx::current_core]
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}
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|
set_property driver_value 0 [ipx::get_ports -filter "direction==in" -of_objects [ipx::current_core]]
|
|
|
|
for {set n 0} {$n < 16} {incr n} {
|
|
|
|
if {($n%4) == 0} {
|
|
adi_if_infer_bus analog.com:interface:if_xcvr_cm slave up_cm_${n} [list \
|
|
"enb up_cm_enb_${n} "\
|
|
"addr up_cm_addr_${n} "\
|
|
"wr up_cm_wr_${n} "\
|
|
"wdata up_cm_wdata_${n} "\
|
|
"rdata up_cm_rdata_${n} "\
|
|
"ready up_cm_ready_${n} "]
|
|
}
|
|
|
|
adi_if_infer_bus analog.com:interface:if_xcvr_cm slave up_es_${n} [list \
|
|
"enb up_es_enb_${n} "\
|
|
"addr up_es_addr_${n} "\
|
|
"wr up_es_wr_${n} "\
|
|
"wdata up_es_wdata_${n} "\
|
|
"rdata up_es_rdata_${n} "\
|
|
"reset up_es_reset_${n} "\
|
|
"ready up_es_ready_${n} "]
|
|
|
|
adi_if_infer_bus analog.com:interface:if_xcvr_ch slave up_rx_${n} [list \
|
|
"pll_locked up_rx_pll_locked_${n} "\
|
|
"rst up_rx_rst_${n} "\
|
|
"user_ready up_rx_user_ready_${n} "\
|
|
"rst_done up_rx_rst_done_${n} "\
|
|
"prbssel up_rx_prbssel_${n} "\
|
|
"prbscntreset up_rx_prbscntreset_${n}"\
|
|
"prbserr up_rx_prbserr_${n} "\
|
|
"prbslocked up_rx_prbslocked_${n} "\
|
|
"bufstatus up_rx_bufstatus_${n} "\
|
|
"bufstatus_rst up_rx_bufstatus_rst_${n}"\
|
|
"lpm_dfe_n up_rx_lpm_dfe_n_${n} "\
|
|
"rate up_rx_rate_${n} "\
|
|
"sys_clk_sel up_rx_sys_clk_sel_${n} "\
|
|
"out_clk_sel up_rx_out_clk_sel_${n} "\
|
|
"enb up_rx_enb_${n} "\
|
|
"addr up_rx_addr_${n} "\
|
|
"wr up_rx_wr_${n} "\
|
|
"wdata up_rx_wdata_${n} "\
|
|
"rdata up_rx_rdata_${n} "\
|
|
"ready up_rx_ready_${n} "]
|
|
|
|
adi_if_infer_bus analog.com:interface:if_xcvr_ch slave up_tx_${n} [list \
|
|
"pll_locked up_tx_pll_locked_${n} "\
|
|
"rst up_tx_rst_${n} "\
|
|
"user_ready up_tx_user_ready_${n} "\
|
|
"rst_done up_tx_rst_done_${n} "\
|
|
"prbsforceerr up_tx_prbsforceerr_${n}"\
|
|
"prbssel up_tx_prbssel_${n} "\
|
|
"bufstatus up_tx_bufstatus_${n} "\
|
|
"lpm_dfe_n up_tx_lpm_dfe_n_${n} "\
|
|
"rate up_tx_rate_${n} "\
|
|
"sys_clk_sel up_tx_sys_clk_sel_${n} "\
|
|
"out_clk_sel up_tx_out_clk_sel_${n} "\
|
|
"tx_diffctrl up_tx_diffctrl_${n} "\
|
|
"tx_postcursor up_tx_postcursor_${n} "\
|
|
"tx_precursor up_tx_precursor_${n} "\
|
|
"enb up_tx_enb_${n} "\
|
|
"addr up_tx_addr_${n} "\
|
|
"wr up_tx_wr_${n} "\
|
|
"wdata up_tx_wdata_${n} "\
|
|
"rdata up_tx_rdata_${n} "\
|
|
"ready up_tx_ready_${n} "]
|
|
|
|
ipx::add_bus_interface rx_${n} [ipx::current_core]
|
|
set_property abstraction_type_vlnv xilinx.com:display_jesd204:jesd204_rx_bus_rtl:1.0 \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property bus_type_vlnv xilinx.com:display_jesd204:jesd204_rx_bus:1.0 \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property interface_mode master [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
ipx::add_port_map rxcharisk [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name rx_charisk_${n} [ipx::get_port_maps rxcharisk -of_objects \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
ipx::add_port_map rxnotintable [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name rx_notintable_${n} [ipx::get_port_maps rxnotintable -of_objects \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
ipx::add_port_map rxdisperr [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name rx_disperr_${n} [ipx::get_port_maps rxdisperr -of_objects \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
ipx::add_port_map rxdata [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name rx_data_${n} [ipx::get_port_maps rxdata -of_objects \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
ipx::add_port_map rxheader [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name rx_header_${n} [ipx::get_port_maps rxheader -of_objects \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
ipx::add_port_map rxblock_sync [ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name rx_block_sync_${n} [ipx::get_port_maps rxblock_sync -of_objects \
|
|
[ipx::get_bus_interfaces rx_${n} -of_objects [ipx::current_core]]]
|
|
|
|
ipx::add_bus_interface tx_${n} [ipx::current_core]
|
|
set_property abstraction_type_vlnv xilinx.com:display_jesd204:jesd204_tx_bus_rtl:1.0 \
|
|
[ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
set_property bus_type_vlnv xilinx.com:display_jesd204:jesd204_tx_bus:1.0 \
|
|
[ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
set_property interface_mode slave [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
ipx::add_port_map txcharisk [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name tx_charisk_${n} [ipx::get_port_maps txcharisk -of_objects \
|
|
[ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]]
|
|
ipx::add_port_map txdata [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name tx_data_${n} [ipx::get_port_maps txdata -of_objects \
|
|
[ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]]
|
|
ipx::add_port_map txheader [ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]
|
|
set_property physical_name tx_header_${n} [ipx::get_port_maps txheader -of_objects \
|
|
[ipx::get_bus_interfaces tx_${n} -of_objects [ipx::current_core]]]
|
|
|
|
}
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_bus_interfaces up_es_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_bus_interfaces up_rx_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_bus_interfaces rx_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_ports rx_0_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_0 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_0 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_ports up_rx_rst_0 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_bus_interfaces up_tx_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_bus_interfaces tx_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_ports tx_0* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_0 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0} \
|
|
[ipx::get_ports up_tx_rst_0 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0)} \
|
|
[ipx::get_ports cpll_ref_clk_0 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_0 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_0 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_0 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_0 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0)} \
|
|
[ipx::get_ports qpll_ref_clk_0 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_qpll_rst_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 0) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 0)} \
|
|
[ipx::get_bus_interfaces up_cm_0 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_bus_interfaces up_es_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_bus_interfaces up_rx_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_bus_interfaces rx_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_ports rx_1_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_1 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_1 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_ports up_rx_rst_1 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_bus_interfaces up_tx_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_bus_interfaces tx_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_ports tx_1* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_1 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1} \
|
|
[ipx::get_ports up_tx_rst_1 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1)} \
|
|
[ipx::get_ports cpll_ref_clk_1 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_1 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 1) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_1 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_1 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 1) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_1 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_1 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_bus_interfaces up_es_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_bus_interfaces up_rx_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_bus_interfaces rx_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_ports rx_2_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_2 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_2 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_ports up_rx_rst_2 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_bus_interfaces up_tx_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_bus_interfaces tx_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_ports tx_2* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_2 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2} \
|
|
[ipx::get_ports up_tx_rst_2 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2)} \
|
|
[ipx::get_ports cpll_ref_clk_2 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_2 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 2) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_2 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_2 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 2) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_2 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_2 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_bus_interfaces up_es_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_bus_interfaces up_rx_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_bus_interfaces rx_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_ports rx_3_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_3 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_3 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_ports up_rx_rst_3 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_bus_interfaces up_tx_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_bus_interfaces tx_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_ports tx_3* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_3 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3} \
|
|
[ipx::get_ports up_tx_rst_3 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3)} \
|
|
[ipx::get_ports cpll_ref_clk_3 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_3 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 3) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_3 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_3 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 3) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_3 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_3 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_bus_interfaces up_es_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_bus_interfaces up_rx_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_bus_interfaces rx_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_ports rx_4_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_4 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_4 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_ports up_rx_rst_4 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_bus_interfaces up_tx_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_bus_interfaces tx_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_ports tx_4* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_4 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4} \
|
|
[ipx::get_ports up_tx_rst_4 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4)} \
|
|
[ipx::get_ports cpll_ref_clk_4 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_4 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_4 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_4 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_4 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4)} \
|
|
[ipx::get_ports qpll_ref_clk_4 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_qpll_rst_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 4) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 4)} \
|
|
[ipx::get_bus_interfaces up_cm_4 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_bus_interfaces up_es_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_bus_interfaces up_rx_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_bus_interfaces rx_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_ports rx_5_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_5 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_5 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_ports up_rx_rst_5 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_bus_interfaces up_tx_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_bus_interfaces tx_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_ports tx_5* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_5 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5} \
|
|
[ipx::get_ports up_tx_rst_5 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5)} \
|
|
[ipx::get_ports cpll_ref_clk_5 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_5 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 5) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_5 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_5 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 5) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_5 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_5 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_bus_interfaces up_es_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_bus_interfaces up_rx_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_bus_interfaces rx_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_ports rx_6_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_6 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_6 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_ports up_rx_rst_6 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_bus_interfaces up_tx_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_bus_interfaces tx_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_ports tx_6* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_6 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6} \
|
|
[ipx::get_ports up_tx_rst_6 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6)} \
|
|
[ipx::get_ports cpll_ref_clk_6 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_6 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 6) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_6 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_6 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 6) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_6 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_6 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_bus_interfaces up_es_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_bus_interfaces up_rx_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_bus_interfaces rx_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_ports rx_7_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_7 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_7 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_ports up_rx_rst_7 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_bus_interfaces up_tx_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_bus_interfaces tx_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_ports tx_7* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_7 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7} \
|
|
[ipx::get_ports up_tx_rst_7 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7)} \
|
|
[ipx::get_ports cpll_ref_clk_7 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_7 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 7) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_7 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_7 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 7) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_7 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_7 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_bus_interfaces up_es_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_bus_interfaces up_rx_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_bus_interfaces rx_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_ports rx_8_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_8 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_8 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_ports up_rx_rst_8 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_bus_interfaces up_tx_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_bus_interfaces tx_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_ports tx_8* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_8 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8} \
|
|
[ipx::get_ports up_tx_rst_8 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8)} \
|
|
[ipx::get_ports cpll_ref_clk_8 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_8 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_8 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_8 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_8 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8)} \
|
|
[ipx::get_ports qpll_ref_clk_8 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_qpll_rst_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 8) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 8)} \
|
|
[ipx::get_bus_interfaces up_cm_8 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_bus_interfaces up_es_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_bus_interfaces up_rx_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_bus_interfaces rx_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_ports rx_9_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_9 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_9 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_ports up_rx_rst_9 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_bus_interfaces up_tx_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_bus_interfaces tx_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_ports tx_9* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_9 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9} \
|
|
[ipx::get_ports up_tx_rst_9 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9)} \
|
|
[ipx::get_ports cpll_ref_clk_9 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_9 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 9) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_9 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_9 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 9) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_9 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_9 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_bus_interfaces up_es_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_bus_interfaces up_rx_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_bus_interfaces rx_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_ports rx_10_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_10 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_10 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_ports up_rx_rst_10 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_bus_interfaces up_tx_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_bus_interfaces tx_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_ports tx_10* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_10 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10} \
|
|
[ipx::get_ports up_tx_rst_10 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10)} \
|
|
[ipx::get_ports cpll_ref_clk_10 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_10 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 10) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_10 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_10 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 10) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_10 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_10 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_bus_interfaces up_es_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_bus_interfaces up_rx_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_bus_interfaces rx_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_ports rx_11_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_11 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_11 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_ports up_rx_rst_11 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_bus_interfaces up_tx_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_bus_interfaces tx_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_ports tx_11* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_11 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11} \
|
|
[ipx::get_ports up_tx_rst_11 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11)} \
|
|
[ipx::get_ports cpll_ref_clk_11 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_11 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 11) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_11 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_11 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 11) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_11 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_11 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_bus_interfaces up_es_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_bus_interfaces up_rx_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_bus_interfaces rx_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_ports rx_12_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_12 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_12 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_ports up_rx_rst_12 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_bus_interfaces up_tx_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_bus_interfaces tx_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_ports tx_12* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_12 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12} \
|
|
[ipx::get_ports up_tx_rst_12 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12)} \
|
|
[ipx::get_ports cpll_ref_clk_12 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_12 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_12 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_12 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_12 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12)} \
|
|
[ipx::get_ports qpll_ref_clk_12 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_qpll_rst_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 12) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 12)} \
|
|
[ipx::get_bus_interfaces up_cm_12 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
[ipx::get_bus_interfaces up_es_13 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
[ipx::get_bus_interfaces up_rx_13 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
[ipx::get_bus_interfaces rx_13 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
[ipx::get_ports rx_13_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_13 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_13 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_13 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13} \
|
|
[ipx::get_ports up_rx_rst_13 -of_objects [ipx::current_core]] \
|
|
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set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
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[ipx::get_bus_interfaces up_tx_13 -of_objects [ipx::current_core]]
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|
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set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
|
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[ipx::get_bus_interfaces tx_13 -of_objects [ipx::current_core]]
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|
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set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
|
|
[ipx::get_ports tx_13* -of_objects [ipx::current_core]] \
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|
[ipx::get_ports tx_clk_13 -of_objects [ipx::current_core]] \
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|
[ipx::get_ports tx_out_clk_13 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13} \
|
|
[ipx::get_ports up_tx_rst_13 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
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|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13) or \
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|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13)} \
|
|
[ipx::get_ports cpll_ref_clk_13 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_13 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
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|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 13) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_13 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_13 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 13) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_13 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_13 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_bus_interfaces up_es_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_bus_interfaces up_rx_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_bus_interfaces rx_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_ports rx_14_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_14 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_14 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_ports up_rx_rst_14 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_bus_interfaces up_tx_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_bus_interfaces tx_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_ports tx_14* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_14 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14} \
|
|
[ipx::get_ports up_tx_rst_14 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14)} \
|
|
[ipx::get_ports cpll_ref_clk_14 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_14 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 14) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_14 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_14 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 14) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_14 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_14 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_bus_interfaces up_es_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_bus_interfaces up_rx_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_bus_interfaces rx_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_ports rx_15_* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_clk_15 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_calign_15 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_ports up_rx_rst_15 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_bus_interfaces up_tx_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_bus_interfaces tx_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_ports tx_15* -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_clk_15 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15} \
|
|
[ipx::get_ports up_tx_rst_15 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15)} \
|
|
[ipx::get_ports cpll_ref_clk_15 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports up_cpll_rst_15 -of_objects [ipx::current_core]]
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.RX_NUM_OF_LANES')) > 15) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports rx_clk_2x_15 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports rx_out_clk_div2_15 -of_objects [ipx::current_core]] \
|
|
|
|
set_property enablement_dependency \
|
|
{(spirit:decode(id('MODELPARAM_VALUE.TX_NUM_OF_LANES')) > 15) and \
|
|
(spirit:decode(id('MODELPARAM_VALUE.LINK_MODE')) = 2) and \
|
|
((spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 5) or \
|
|
(spirit:decode(id('MODELPARAM_VALUE.XCVR_TYPE')) = 8))} \
|
|
[ipx::get_ports tx_clk_2x_15 -of_objects [ipx::current_core]] \
|
|
[ipx::get_ports tx_out_clk_div2_15 -of_objects [ipx::current_core]] \
|
|
|
|
adi_add_auto_fpga_spec_params
|
|
set cc [ipx::current_core]
|
|
set param [ipx::get_user_parameters CH_HSPMUX -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 8} ? 0x2424 : \
|
|
{$XCVR_TYPE == 9} ? 0x2020 : 0x0]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters PPF0_CFG -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x800 : 0x600]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters RXPI_CFG0 -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 8} ? 0x2 : \
|
|
{$XCVR_TYPE == 9} ? 0x100 : 0x0]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters RXPI_CFG1 -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 8} ? 0x15 : 0x0]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters RTX_BUF_CML_CTRL -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x3 : 0x0]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters QPLL_LPF -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x37f : 0x137]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters RXCDR_CFG3_GEN2 -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x12 : 0x1a ]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters RXCDR_CFG3_GEN4 -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {[format "0x%x" [expr {$XCVR_TYPE == 9} ? 0x12 : 0x24 ]]} \
|
|
] $param
|
|
|
|
set param [ipx::get_user_parameters TX_PI_BIASSET -of_objects $cc]
|
|
set_property -dict [list \
|
|
value_tcl_expr {expr {$XCVR_TYPE == 9} ? 0 : 1} \
|
|
] $param
|
|
|
|
|
|
ipx::create_xgui_files [ipx::current_core]
|
|
|
|
ipx::save_core [ipx::current_core]
|
|
|