Istvan Csomortani 9043f3737b Revert "a10gx: Optimise the base design" ... This reverts commit 9afc871b70.		2020-08-11 10:14:18 +03:00
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a10gx	Revert "a10gx: Optimise the base design"	2020-08-11 10:14:18 +03:00
a10soc	a10soc_system_qsys: sys_dma_clk clock_source inherit its clock frequency from its source	2019-10-02 15:32:17 +03:00
ac701	system_id: deployed ip	2019-08-06 16:53:11 +03:00
c5soc	Remove executable flag from non-executable files	2017-07-28 17:56:07 +02:00
coraz7s	cn0540: Initial commit	2020-05-28 18:49:35 +03:00
de10	DE10: Initial commit	2018-04-11 15:09:54 +03:00
intel	avl_dacfifo: add_intance command must have a version attribute	2020-08-11 10:14:18 +03:00
kc705	system_id: deployed ip	2019-08-06 16:53:11 +03:00
kcu105	system_id: deployed ip	2019-08-06 16:53:11 +03:00
microzed	system_id: deployed ip	2019-08-06 16:53:11 +03:00
vc707	system_id: deployed ip	2019-08-06 16:53:11 +03:00
vcu118	common:vcu118: support for plddr4 adc and dac fifo	2020-03-03 15:49:11 +02:00
xilinx	adi_fir_filter_bd.tcl: Synchronize the control GPIO input to the core clock	2019-12-03 17:27:56 +02:00
zc702	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00
zc706	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00
zcu102	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00
zed	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00